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ORCID13th DTIS 2018: Taormina, Italy
- 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, DTIS 2018, Taormina, Italy, April 9-12, 2018. IEEE 2018, ISBN 978-1-5386-5291-6
- Liang Wu, Mohammad Khizer Hussain, Saed Abughannam, Wolfgang Müller, Christoph Scheytt
, Wolfgang Ecker:
Analog fault simulation automation at schematic level with random sampling techniques. 1-4 - Fabian Speicher, Christoph Beyerstedt, Markus Scholl, Tobias Saalfeld, Vahid Bonehi, Moritz Schrey, Ralf Wunderlich, Stefan Heinen:
Methodology for improved event-driven system-level simulation of an RF transceiver subsystem for wireless SoCs. 1-4 - Lukás Kohútka, Viera Stopjaková:
A novel hardware-accelerated real-time task scheduler based on robust earliest deadline algorithm. 1-2 - Islam Ahmed, Hassan Mostafa, Ahmed Nader Mohieldin:
Dynamic partial reconfiguration verification using assertion based verification. 1-2 - Chithra Liz Palson, Deepti Das Krishna, Jimson Mathew, Babita Roslind Jose, Marco Ottavi, Vishal Gupta:
Memristor based adaptive impedance and frequency tuning network. 1-2 - Alessandro Finocchiaro, Giovanni Girlando, Alessandro Motta, Alberto Pagani, Giuseppe Palmisano:
A fully contactless wafer-level testing for UHF RFID tag with on-chip antenna. 1-6 - Ernesto Sánchez:
Increasing reliability of safety critical applications through functional based solutions. 1 - Binghua Lu, Selina Sha, Jincheng Wang, Zhigao Zhang, Fanjin Meng, Dragon Hsu, Rick Fisette:
The test cost reduction benefits of combining a hierarchical DFT methodology with EDT channel sharing - A case study. 1-4 - Alessandro Vallero, Alberto Carelli, Stefano Di Carlo:
Trading-off reliability and performance in FPGA-based reconfigurable heterogeneous systems. 1-6 - Andrea Floridia, Davide Piumatti, Ernesto Sánchez, Sergio de Luca, Alessandro Sansonetti:
Parallel software-based self-test suite for multi-core system-on-chip: Migration from single-core to multi-core automotive microcontrollers. 1-6 - Bastien Deveautour, Arnaud Virazel, Patrick Girard, Serge Pravossoudovitch, Valentin Gherman:
Is aproximate computing suitable for selective hardening of arithmetic circuits? 1-6 - Ievgen Kabin, Zoya Dyka, Dan Kreiser, Peter Langendörfer:
Unified field multiplier for ECC: Inherent resistance against horizontal SCA attacks. 1-4 - Emanuele Valea, Mathieu Da Silva, Giorgio Di Natale, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre:
SI ECCS: SECure context saving for IoT devices. 1-2 - S. Kala, Nalesh Sivanandan, Babita R. Jose, Jimson Mathew, Marco Ottavi:
Two dimensional FFT architecture based on radix-43 algorithm with efficient output reordering. 1-2 - Jacopo Sini, A. Mugoni, Massimo Violante, A. Quario, C. Argiri, F. Fusetti:
An automatic approach to integration testing for critical automotive software. 1-2 - Marco Ottavi, Dario Asciolla, Tiziano Fiorucci, Elena Grosso, Carla Marzullo, Alessandro Scaramella, Simone Stramaccioni, Alessia Zibecchi, Carla Andreani, Gian Carlo Cardarilli, Carlo Cazzaniga, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Pedro Reviriego, Gianluca Furano, Roberto Senesi:
Setup and experimental results analysis of COTS Camera and SRAMs at the ISIS neutron facility. 1-4 - Ales Chvála, Lukás Nagy, Juraj Marek, Juraj Priesol, Daniel Donoval, Alexander Satka, Michal Blaho, Dagmar Gregusová, Ján Kuzmík:
Device and circuit models of InAlN/GaN D- and dual-gate E-mode HEMTs for design and characterisation of monolithic NAND logic cell. 1-6 - Dennis Noll, Udo Schwalke:
Ammonia sensors based on in situ fabricated nanocrystalline graphene field-effect devices. 1-5 - Tillmann Krauss, Frank Wessely, Udo Schwalke:
Reconfigurable electrostatically doped 2.5-gate planar field-effect transistors for dopant-free CMOS. 1-4 - K. Akshay, Parvathy R. Pillai, B. Bhuvan:
An alytical modeling of response time and full well capacity of a pinned photo diode. 1-6 - Michelangelo Grosso, Salvatore Rinaudo, Edoardo Patti, Andrea Acquaviva:
An energy-autonomous wireless sensor network development platform. 1-6 - Michael K. Tsiampas, Nestor E. Evmorfopoulos, Konstantis Daloukas, John Moondanos, Georgios I. Stamoulis:
A power-supply noise aware dynamic timing analysis methodology, based on a statistical prediction engine. 1-6 - Jing Yang, Nianxiong Tan, Ching-Kae Harris Tzou:
A resource-efficient FFT/IFFT architecture for PRIME PLC systems. 1-2 - Hassen Aziza, Christian Dufaza, Annie Pérez:
A configurable operational amplifier based on oxide resistive RAMs. 1-2 - Ioannis Voyiatzis, Costas Efstathiou:
SIC pair generation in near-optimal time with carry-look ahead adders. 1-2 - Eman El Mandouh, Ashraf Salem, Mennatallah Amer, Amr G. Wassal:
Cross-product functional coverage analysis using machine learning clustering techniques. 1-2 - Giovanni Mezzina, Daniela De Venuto:
Wireless sEMG/footswitch driven FPGA embedded digital processor for dynamic MFCV estimation. 1-2 - Benjamin Willsch, Marius te Heesen, Julia Hauser, Stefan Dreiner, Holger Kappert, Holger Vogt:
Evaluation of a median threshold based EEPROM-PUF concept implemented in a high temperature SOI CMOS technology. 1-6 - Alessandro Sitta, Sebastiano Russo, Gaetano Bazzano, Daniela Cavallaro, Giuseppe Greco, Michele Calabretta:
Numerical approach to predict power device reliability. 1-5 - Emna Farjallah, Valentin Gherman, Jean-Marc Armani, Luigi Dilillo:
Evaluation of the temperature influence on SEU vulnerability of DICE and 6T-SRAM cells. 1-5 - Carmen G. Almudéver, Nader Khammassi, Louis Hutin, Maud Vinet, Masoud Babaie, Fabio Sebastiano, Edoardo Charbon, Koen Bertels:
Towards a scalable quantum computer. 1 - Zoran Stamenkovic:
A novel MAC protocol for industrial WLAN: Hardware aspects. 1 - Ioannis Voyiatzis, Constantinos Efstathiou, Cleo Sgouropoulou:
Programmable logic for single-output functions. 1-2 - Antoine Bouvet, Nicolas Bruneau, Adrien Facon, Sylvain Guilley, Damien Marion:
Give me your binary, I'll tell you if it leaks. 1-4 - Adam Crha, Václav Simek, Richard Ruzicka:
Towards novel format for representation of polymorphic circuits. 1-2 - Theodoros Simopoulos, Themistoklis Haniotakis, George Alexiou:
A 1Kx32 bit WDSRAM page with rapid write access. 1-2 - Petr Fiser, Václav Simek:
Optimum polymorphic circuits synthesis method. 1-6 - Dan Kreiser, Zoya Dyka, Ievgen Kabin, Peter Langendörfer:
Low-energy key exchange for automation systems. 1-5 - Ramy Ahmed, Hassan Mostafa, Ahmed H. Khalil:
Impact of dynamic partial reconfiguration on CONNECT Network-on-Chip for FPGAs. 1-5
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