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ORCID11th ICECS 2004: Tel Aviv, Israel
- Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004, Tel Aviv, Israel, December 13-15, 2004. IEEE 2004, ISBN 0-7803-8715-5
Analog Amplifiers
- Igor M. Filanovsky, Andrew Sachko, John R. Long:
A new configuration of two-stage wide-band amplifier with matched input and output impedances. 1-4 - Jonathan Rosenfeld, Mücahit Kozak, Eby G. Friedman:
A bulk-driven CMOS OTA with 68 dB DC gain. 5-8 - Vadim Ivanov, Junlin Zhou, Igor M. Filanovsky:
A 100 dB CMRR CMOS operational amplifier with single-supply capability. 9-12 - Yuri Bruck, Michael Zelikson:
Two novel cross-cascode differential amplifiers. 13-16 - Aimad El Mourabit, Patrick Pittet, Guo-Neng Lu:
A wide-linear range subthreshold OTA based on FGMOS transistor. 17-20
RF Oscillators
- Min Chu, David J. Allstot:
A 6 GHz low-noise quadrature Colpitts VCO. 21-24 - Min Chu, Sudip Shekhar, David J. Allstot, Tarun Kanti Bhattacharyya:
Design considerations for anti-phase injected quadrature voltage controlled oscillators. 25-28 - Luca Romanò, Carlo Samori, Salvatore Levantino, Andrea Bonfanti, Andrea L. Lacaita:
A multi-tank LC-oscillator [microwave oscillator example]. 29-32 - Salvatore Levantino, Andrea Bonfanti, Luca Romanò, Carlo Samori, Andrea L. Lacaita:
Differential tuning oscillators with reduced flicker noise upconversion. 33-36 - Andrea Mazzanti, Paola Uggetti, Raffaele Battaglia, Francesco Svelto:
Analysis and design of a dual band reconfigurable VCO. 37-40
Analog Filters
- Slawomir Koziel, A. Ramachandran, Stanislaw Szczepanski, Edgar Sánchez-Sinencio:
Dynamic range, noise and linearity optimization of continuous-time OTA-C filters. 41-44 - Slawomir Koziel:
Noise analysis and optimization of continuous-time active-RC filters. 45-48 - Slawomir Koziel:
General active-RC filter model for computer-aided design and optimization. 49-52 - Drazen Jurisic, Neven Mijat, George S. Moschytz:
Novel method for the closed-form analysis and design of a 4 th order single-amplifier filter. 53-56 - Asher Yahalom, Yosef Pinhasi:
Analysis of linear system response to wide band signals with applications to filters. 57-60
Nonlinear Circuits
- Barry O'Donnell, Orla Feely, Paul F. Curran, Ketan Mistry:
Nonlinear dynamics of first-order DPLL with FM input and phase detector DC offset. 61-64 - Shlomo Engelberg:
The central limit theorem and low-pass filters. 65-68 - H. Narayanan:
Mathematical programming and resistor transformer diode networks. 69-72 - Luís Nero Alves, Rui L. Aguiar:
A new method to improve the impedance of the CC-II's X input. 73-76 - Alon Ascoli, Paul F. Curran, Orla Feely:
New chaotic third-order log-domain oscillator with tanh nonlinearity. 77-80
Communication Systems
- Diego Bartolomé, Ana I. Pérez-Neira
:
A unified fairness framework in multi-antenna multi-user channels. 81-84 - M. Fayar, Xavier Mestre, Miguel Angel Lagunas:
Ergodic capacity of a 2 × 2 MIMO system under phase uncertainty at the transmitter. 85-88 - Naftali Sommer, Itay Lusky, Mor Miller:
Analysis of the probability distribution of the baseline wander effect for baseband PAM transmission with application to gigabit Ethernet. 89-92 - Itamar Elhanany, Ortal Arazi, Michael Kahane:
Virtual input queued packet switches with non-uniform arrivals and bursty service. 93-96 - Michael Kahane, Yehuda Ben-Shimol, Dan Sadot:
Performance evaluation of pseudo self-similar traffic. 97-100
Sigma-Delta Modulators
- Junhua Shen, Kong-Pang Pun, Chiu-sing Choy, Cheong-Fat Chan:
An IF input continuous-time sigma-delta analog-digital converter with high image rejection. 101-104 - Xiaojun Lu:
A novel signal-predicting multibit delta-sigma modulator. 105-108 - Luis Hernández, Pieter Rombouts, Enrique Prefasi, Susana Patón, Mario Garcia, Celia López:
A jitter insensitive continuous-time ΣΔ modulator using transmission lines. 109-112 - Boaz Shem-Tov, Mücahit Kozak, Eby G. Friedman:
A 250 MHz delta-sigma modulator for low cost ultrasound/sonar beamforming applications. 113-116 - Dmitry Akselrod, Shlomo Greenberg, Shlomo Hava:
Multibit ΔΣ CMOS DAC employing enhanced noise-shaped DEM architecture. 117-120
Interconnect Modeling
- Roman Barsky, Israel A. Wagner:
Electromigration-dependent parametric yield estimation. 121-124 - Michael Moreinis, Arkadiy Morgenshtein, Israel A. Wagner, Avinoam Kolodny:
Repeater insertion combined with LGR methodology for on-chip interconnect timing optimization. 125-128 - Larissa Zlydina, Yoad Yagil:
3D power grid modeling. 129-132 - Igor M. Filanovsky, Xiaodai Dong:
Pulse-forming reactance network shapes a quasi-rectangular pulse from sinusoidal voltage. 133-136 - Ouail El-Gharniti, Eric Kerherve, Jean-Baptiste Bégueret, Pierre Jarry:
Modeling of integrated monolithic transformers for silicon RF IC. 137-140
CMOS Imaging Sensors
- Chung-Yu Wu, Wen-Chin Hsieh, Cheng-Ta Chiang:
A CMOS focal-plane retinal sensor designed for shear motion detection. 141-144 - Evgeny Artyomov, Yair Rivenson, Guy Levi, Orly Yadid-Pecht:
Morton (Z) scan based real-time variable resolution CMOS image sensor. 145-148 - Alexander Fish, Alexander Belenky, Orly Yadid-Pecht:
Low power global shutter CMOS active pixel image sensor with ultra-high dynamic range. 149-152 - Igor Shcherback, Orly Yadid-Pecht:
CMOS APS photoresponse and crosstalk optimization analysis for scalable CMOS technologies. 153-155 - Igor Brouk, Yael Nemirovsky:
CMOS SOI image sensor. 156-159
High Performance Integrated Circuits
- Mikhail Popovich, Eby G. Friedman:
Impedance characteristics of decoupling capacitors in multi-power distribution systems. 160-163 - Ilya Obridko, Ran Ginosar:
Low energy asynchronous adders. 164-167 - Oleg V. Kolokoltsev, Svetlana V. Koshevaya, Rodrigo Amezcua Correa, Javier Siqueiros Alatorre, Miguel Ángel Basurto-Pensado, Volodymyr Grimalsky:
Travelling wave LiNbO3 electro-optic modulator with quasi-phase-match coplanar waveguide structure for time-domain applications. 168-170 - Igor Brouk, Yael Nemirovsky:
Noise characterization of the 0.35 μm CMOS analog process implemented in regular and SOI wafers. 171-174 - Hung-Pin Chen, James B. Kuo:
A 0.8 V CMOS TSPC adiabatic DCVS logic circuit with the bootstrap technique for low-power VLSI. 175-178
Special Session - Nanoelectronics, Nanotechnology, and Giga-Scale Systems
- Sheng-Hao Chen, Chung-Yu Wu:
A low power design on diffusive interconnection large-neighborhood cellular nonlinear network for giga-scale system application. 179-182 - Jui-Lin Lai, Chung-Yu Wu:
A learnable self-feedback ratio-memory cellular nonlinear network (SRMCNN) for associative memory applications. 183-186 - Rong-Jian Chen, Jui-Lin Lai:
VLSI implementation of the universal 2-D CAT/ICAT system. 187-190 - Chung-Yu Wu, Jen-Chieh Wang:
Optimal structure of interconnection lines for GHz giga-scale nano-CMOS system-on-chip design. 191-194 - Jie Chen, Chao Wang, Qinwei Shi:
Spintronic logic circuit design for nanoscale computation. 195-198
Special Session - Neuromorphic Systems
- Thomas A. Holz, John G. Harris:
Towards a spiking VLSI implementation of Freeman's olfactory model. 199-202 - Matthias Oster, Shih-Chii Liu:
A winner-take-all spiking network with spiking inputs. 203-206 - R. Jacob Vogelstein, Udayan Mallik, Eugenio Culurciello, Ralph Etienne-Cummings, Gert Cauwenberghs:
Spatial acuity modulation of an address-event imager. 207-210 - Patrick Lichtsteiner, Tobi Delbrück, Jörg Kramer:
Improved ON/OFF temporally differentiating address-event imager. 211-214 - Viktor Gruev, Ralph Etienne-Cummings:
Active pixel sensor with on-chip normal flow computation on the read out. 215-218
Neural Networks
- Rachel Mislovaty, Einat Klein, Ido Kanter, Wolfgang Kinzel:
Security of neural cryptography. 219-221 - Chin-Teng Lin, Chao-Hui Huang:
Texture boundary detection based on multiple and parallel cellular neural networks. 222-225 - Zhichun Yang, Daoyi Xu, Jin Deng, Jianren Niu:
New conditions for exponential stability of delay impulsive neural networks. 226-229 - Jin Deng, Daoyi Xu, Zhichun Yang:
Global exponential stability of Cohen-Grossberg neural networks with multiple time-varying delays. 230-233 - Alexander Fish, Vadim Milrud, Orly Yadid-Pecht:
High speed and high resolution current loser-take-all circuit of O(N) complexity. 234-237
Special Session - Grand Challenges in Circuits and Systems
- Eby G. Friedman:
Challenges in ultra deep submicrometer high performance VLSI circuits. 238- - Alfred M. Bruckstein:
Grand challenges in image processing and analysis. 239- - Orly Yadid-Pecht:
Challenges in CMOS imager design. 240- - Tamás Roska:
Grand challenges in spatial-temporal computing on image flows. 241-
Conversion Circuits
- Tommaso Addabbo, Massimo Alioto, Simone Bernardi, Ada Fort, Santina Rocchi, Valerio Vignoli:
Hardware-efficient PRBGs based on 1-D piecewise linear chaotic maps. 242-245 - Nikolas Stefanou, Sameer R. Sonkusale:
An average low offset comparator for 1.25 Gsample/s ADC in 0.18 μm CMOS. 246-249 - Cyril Recoquillon, Jean-Baptiste Bégueret, Yann Deval, Guy Montignac, Alain Baudry:
A 4 Gsps, 2-4 GHz input bandwidth, 3-bits flash A/D converter. 250-253 - Sanghoon Hwang, Minkyu Song:
A 10-b 500 MSPS current-steering CMOS D/A converter with a self-calibrated current biasing technique. 254-257 - Krzysztof Wawryn, Robert Suszynski, Bogdan Strzeszewski:
Signal processing building blocks for pipelined A/D converter. 258-261
Power Electronics
- Alon Kuperman, Raul Rabinovici:
Shunt voltage regulators for autonomous induction generators. Part I: principles of operation. 262-265 - Alon Kuperman, Raul Rabinovici:
Shunt voltage regulators for autonomous induction generators. Part II: circuits and systems. 266-269 - Vladislav Y. Potanin, Elena E. Potanina:
High-voltage tolerant watchdog comparator in a low-voltage CMOS technology. 270-273 - Ningqiang Jiang, Wenzhong Song:
A restriction on the power system by theoretical requisitions of the BCU method. 274-277 - Lea Mor, Eugenia Bubis, Kas Hemmes, Pinchas Schechner:
Performance of a glucose AFC. 278-281
Analog Circuits and Applications
- Yanbin Wang, Garry Tarr, Yanjie Wang:
Input-free cascode Vthn and Vthp extractor circuits. 282-285 - Victor Varshavsky, Ilya Levin, Vyacheslav Marakhovsky, Alex Ruderman, Nataly Kravchenko:
Fuzzy decision diagram realization by analog CMOS summing amplifiers. 286-289 - Christy L. Rogers, John G. Harris:
A low-power analog spike detector for extracellular neural recordings. 290-293 - Weixin Kong, Chianghua Ye, H. C. Lin:
A 2.4 GHz fully CMOS integrated RF transceiver for 802.11b wireless LAN application. 294-297 - Odysseus Tsakiridis, Evangelos Zervas, Dimitris Syvridis, M. Tsilis, T. John Stonham:
Design of a differential chaotic Colpitts oscillator. 298-301
Video and Multimedia Technology
- Amit Eshet, Meir Feder:
Multistage quantization via conditional hierarchical mapping. 302-305 - Tatiana Danov, Igor Shcherback, Orly Yadid-Pecht:
Ring-shaped N+/P-well photodiode: study of responsivity enhancement. 306-309 - Xinquan Lai, Donglai Xu, Lvshun Hu, Hongyi Wang:
A high precision and low noise S/H circuit design for video signal sampling. 310-313 - Ivica Kolic, Zeljka Mihajlovic, Leo Budin:
Stencil shadow volumes for complex and deformable objects. 314-317 - Udy Danino, Nahum Kiryati, Miriam Furst:
Algorithm for facial weight-change [image weight-change simulator]. 318-321
Mixed-Signal Circuits
- Xiaoxiang Gong, John G. Harris:
A spike-based adaptive filter. 322-325 - Xiaofeng Wang, Zhouyuan Shi, Sameer Sonkusale:
A robust offset cancellation scheme for analog multipliers [utilises digital integrator]. 326-329 - Benjamin G. Salomon, Hanoch Ur:
Sparse approximations with a high resolution greedy algorithm. 330-333 - Dieter Brückmann, Markus Hammes, André Neubauer:
A CPFSK/PSK-phase reconstruction-receiver for enhanced data rate Bluetooth systems. 334-337 - Amir Leshem, Youming Li:
A low complexity coordinated FEXT cancellation for VDSL. 338-341
Communication Receivers
- Danny M. Frai, Arie Reichman:
Fast acquisition CDMA receiver for burst transmission system. 342-345 - Yossef Rahamim, Avraham Freedman, Arie Reichman:
ML iterative tentative-decision-directed (ML-ITDD): a carrier synchronization system for short packet turbo coded communication. 346-349 - Naftali Sommer:
Timing recovery of PAM signals using baud rate interpolation. 350-353 - Liran Brecher, Naftali Sommer, Ehud Weinstein:
Analysis of lock-loss events in discrete-time phase locked loop (PLL). 354-357 - Shlomo Greenberg, Nir Feldblum, Gal Melamed:
Implementation of the Berlekamp-Massey algorithm using a DSP. 358-361
Process and Device Simulation
- Eitan N. Shauly, Richard Ghez, Yigal Komem:
Experimental extraction of point defects parameters needed for 2-D process modeling using reverse modeling. 362-364 - Sadayuki Yoshitomi:
Analysis and simulation of spiral inductor fabricated on silicon substrate. 365-368 - Bryan A. Brady, Alex K. Jones, Ivan S. Kourtev:
Efficient CAD development for emerging technologies using Objective-C and Cocoa. 369-372 - Agostino Giorgio, Roberto Diana, Anna Gina Perri:
Design of waveguiding photonic bandgap devices by using the resonant PBG device Bloch-Floquet theorem. 373-376 - Yu Chen, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky, Yuhong Zheng:
Evaluation of the new OASIS format for layout fill compression. 377-382
System and Device Modeling
- Michal Silbermintz, Amir Sahar, Itay Peled, Moshe Anschel, Emil Watralov, Hillel Miller, Eytan Weisberger:
SOC modeling methodology for architectural exploration and software development. 383-386 - Josef Dobes, Jan Míchal:
Enhancement of the semisymbolic analysis precision using the variable-length arithmetic. 387-390 - Vladimir Ceperic, Adrijan Baric:
Modeling of analog circuits by using support vector regression machines. 391-394 - Matthias Bucher, Antonios Bazigos, Nikolaos Nastos, Yannis Papananos, François Krummenacher, Sadayuki Yoshitomi:
Analysis of harmonic distortion in deep submicron CMOS. 395-398 - Qassem Al-Zoubi, Adnan Al-Smadi:
A compact method for obtaining the hybrid parameters of the BJT amplifier. 399-402
Interconnect Design
- Anastasia Barger, David Goren, Avinoam Kolodny:
Design and modelling of network on chip interconnects using transmission lines. 403-406 - Robert H. Flake, John F. Biskup:
Signal propagation without distortion in dispersive lossy media. 407-410 - Shay Michaely, Shmuel Wimer, Avinoam Kolodny:
Optimal resizing of bus wires in layout migration. 411-414 - Dimitrios Velenis, Ramyashree Sundaresha, Eby G. Friedman:
Buffer sizing for delay uncertainty induced by process variations. 415-418 - Shlomo Greenberg, Ido Bloch, Moti Horwitz, Avishay Maman:
Optimization of chip level clock tree performance by using simultaneous drivers and wire sizing. 419-423
Biomedical and Industrial Applications
- Liby Sudakov-Boreysha, Uri Dinnar, Yael Nemirovsky:
New ISFET catheters encapsulation techniques for brain pH in-vivo monitoring. 424-426 - Yu-Ting Jui, Daniel C. Sadowski, Karan V. I. S. Kaler, Martin P. Mintchev:
The ESO-Pill™: a non-invasive MEMS capsule for bolus transit monitoring in the esophagus. 427-430 - David Abookasis, Joseph Rosen:
Microlens array help imaging hidden objects for medical applications. 431-434 - Hedva Spitzer, Yair Zimmer:
Improvement of illumination artifacts in medical ultrasound images using a biologically based algorithm for compression of wide dynamic range. 435-438
Control Systems and Applications
- Allon Guez, Robert E. Cochran, Ilan Rusnak:
Distributed system design and control via multiple objectives optimization. 439-442 - Simon Cooper, Alon Kuperman, Raul Rabinovici:
Controlling an electrical motion system by a load instruction decoding algorithm using FPGA. 443-446 - Adriano Cavalcanti, Lior Rosen, Luiz C. Kretly, Moshe Rosenfeld, Shmuel Einav:
Nanorobotic challenges in biomedical applications, design and control. 447-450 - Abdulah Aksamovic, Samim Konjicija:
Numerical algorithm for measurement of angle phase shift for sines signal. 451-454 - Feng Ping, Erzhi Wang, Peter Cooke, Yuanchun Shi:
A new method to analyse the unique steady state of nonlinear nonautonomous circuits. 455-458
Micro-Opto-Electro-Mechanical Systems
- Edward Bormashenko, Roman Pogreb, Oleg Stanevsky, Yaniv Biton, Yelena Bormashenko, Vladimir Streltsov, Yehoshua Socol:
2D photonic crystals deposited on polymer piezoelectric substrates - new kind of MOEMS. 459-462 - Agostino Giorgio, Roberto Diana, Anna Gina Perri:
A method to design DWDM filters on photonic crystals. 463-466 - Omer Cohen, Yael Nemirovsky:
A novel design and fabrication method of scanning micro-mirror for retinal scan displays. 467-470 - Omer Cohen, Avshalom Shai, Yael Nemirovsky:
A novel design and fabrication method of a pyramidal shape chip for scanning micro mirror. 471-474 - Zeev Zalevsky, Amir Shemer, Vardit Eckhouse, David Mendlovic, Shlomo Zach:
Compact RF-photonic configuration for highly resolved and ultra-fast extraction of carrier and information of radar signal. 475-478
SOC Design and Integration
- Evgeny Bolotin, Arkadiy Morgenshtein, Israel Cidon, Ran Ginosar, Avinoam Kolodny:
Automatic hardware-efficient SoC integration by QoS network on chip. 479-482 - Arkadiy Morgenshtein, Evgeny Bolotin, Israel Cidon, Avinoam Kolodny, Ran Ginosar:
Micro-modem - reliability solution for NoC communications. 483-486 - Ali Telli, Simsek Demir, Murat Askar:
Practical performance of planar spiral inductors. 487-490 - Gilles Petit, Richard Kielbasa, Vincent Petit:
Criterion of design for small value integrated self-inductors. 491-494
High Performance Architectures
- Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis:
A high performance data-path to accelerate DSP kernels. 495-498 - Alex K. Jones, Raymond Hoare, Ivan S. Kourtev, Joshua Fazekas, Dara Kusic, John Foster, Sedric Boddie, Ahmed Muaydh:
A 64-way VLIW/SIMD FPGA architecture and design flow. 499-502 - Serafim Poriazis:
The 1: 10 phased demultiplexer circuit. 503-506 - Itai Yarom, Gabi Glasser:
SystemC opportunities in chip design flow. 507-510
Advanced Synthesis and Verification Methodologies
- Giora Kolotov, Ilya Levin, Vladimir Ostrovsky:
Techniques for formal transformations of binary decision diagrams. 511-514 - Eyal Segev, Sharon Goldshlager, Hillel Miller, Oren Shua, Olga Sher, Shlomo Greenberg:
Evaluating and comparing simulation verification vs. formal verification approach on block level design. 515-518 - Zvi Terem, Gila Kamhi, Moshe Y. Vardi, Amitai Irron:
Pattern search in hierarchical high-level designs. 519-522 - Juan Manuel Górriz, Carlos García Puntonet, Moisés Salmerón, Elmar Wolfgang Lang:
Meta-heuristics hybridizing independent component analysis with genetic algorithms. 523-526
Image and Vision Systems
- Kio Kim, Nathan Intrator, Nicola Neretti:
Image registration and mosaicing of noisy acoustic camera images. 527-530 - Yitzhak David, Nonel Thirer, Itzhak Baal-Zedaka, Uzi Efron:
Design of low cross-talk image transceiver device and controller circuitry. 531-534 - Liby Sudakov-Boreysha, Arkadiy Morgenshtein, Uri Dinnar, Yael Nemirovsky:
ISFET CMOS compatible design and encapsulation challenges. 535-538 - David Abookasis, Joseph Rosen:
Computer aided design using CGH of a three-dimensional objects. 539-542 - Alexander Fish, Aleksander Spivakovsky, Alexander Golberg, Orly Yadid-Pecht:
VLSI sensor for multiple targets detection and tracking. 543-546
Digital Signal Processing
- Yiyan Tang, Yuke Wang, Jin-Gyun Chung, Sang Seob Song, Myoung-Seob Lim:
High-speed assembly FFT implementation with memory reference reduction on DSP processors. 547-550 - Raul M. Putinica, Stefan Stancescu:
Viterbi detection analysis on RLL encoded sequences [magnetic recording applications]. 551-554 - Evgeny Margolis, Yonina C. Eldar:
Reconstruction of nonuniformly sampled periodic signals: algorithms and stability analysis. 555-558 - Yonina C. Eldar, Tsvi G. Dvorkind:
Minimax sampling with arbitrary spaces [signal sampling and reconstruction]. 559-562 - Neil A. Fraser, Behrouz Nowrouzian:
A statistical technique for the determination of the noise power gain in higher-order Σ-Δ A/D converters excited by DC input signals. 563-566
VLSI Cryptology
- Harris E. Michail, Athanasios P. Kakarountas, Athanasios Milidonis, Costas E. Goutis:
Efficient implementation of the keyed-hash message authentication code (HMAC) using the SHA-1 hash function. 567-570 - Michalis D. Galanis, Paris Kitsos, Giorgos Kostopoulos, Nicolas Sklavos, Odysseas G. Koufopavlou, Costas E. Goutis:
Comparison of the hardware architectures and FPGA implementations of stream ciphers. 571-574 - Georgios N. Selimis, Paris Kitsos, Odysseas G. Koufopavlou:
High performance cryptographic engine PANAMA: hardware implementation. 575-578 - Nicolas Sklavos, Georgios N. Selimis, Odysseas G. Koufopavlou:
Bulk encryption crypto-processor for smart cards: design and implementation. 579-582
Design for Testability and Reliability
- Stanislaw Deniziak, Krzysztof Sapiecha:
Fast high-level fault simulator. 583-586 - Yefim Fefer, Sergey Sofer:
Automatic system for VLSI on-chip clock synthesizers characterization. 587-590 - Yoav Weizman, Yefim Fefer, Sergey Sofer, Ezra Baruch:
Investigation of on-chip PLL irregularities under stress conditions - case study. 591-594 - Miguel Angel Domínguez, José L. Ausín, Guido Torelli, J. Francisco Duque-Carrillo:
On-chip area-efficient spectrum analyzer for testing analog IC. 595-598
Sequential Synthesis Methodologies
- Joshua M. Lucas, Raymond R. Hoare, Ivan S. Kourtev, Alex K. Jones:
LURU: global-scope FPGA technology mapping with content-addressable memories. 599-602 - Baris Taskin, Ivan S. Kourtev:
Advanced timing of level-sensitive sequential circuits. 603-606 - Baris Taskin, Ivan S. Kourtev:
Performance improvement of edge-triggered sequential circuits. 607-610 - Li Liang, Majid Ahmadi, Maher A. Sid-Ahmed:
Design of complementary filter pairs with canonical signed-digit coefficients using genetic algorithm. 611-614
Low Noise Amplifiers
- Davide Guermandi, Eleonora Franchi, Antonio Gnudi:
A design flow for inductively degenerated LNAs. 615-618 - Gaurab Banerjee, David T. Becher, Celia Hung, Krishnamurthy Soumyanath, David J. Allstot:
Desensitized design of MOS low noise amplifiers by Rn minimization. 619-622 - Boaz Shem-Tov, Mücahit Kozak, Eby G. Friedman:
A high-speed CMOS op-amp design technique using negative Miller capacitance. 623-626 - José Miguel Dias Pereira, Pedro Silva Girão, Octavian Postolache:
Adaptive analog-to-digital conversion using self-dithering in data acquisition systems. 627-630
Special Session - Reinventing Methods and Tools for Next-Generation CMOS Design
- Daniel Foty:
Perspectives on scaling theory and CMOS technology - understanding the past, present, and future. 631-637 - Gennady Gildenblat, Colin C. McAndrew, Hailing Wang, Weimin Wu, Daniel Foty, Laurent Lemaitre, Peter Bendix:
Advanced compact models: gateway to modern CMOS design. 638-641 - Peter Bendix, Daniel Foty, David Pachura:
Practical aspects of MOS transistor model "accuracy" in modern CMOS technology. 642-645
Image Processing
- Yuan Xiong, Yi Zhang, Danya Yao:
A robust and fast model-based athlete contour tracking in diving videos. 646-649 - Nagesh K. Subbanna, Yonina C. Eldar:
Efficient Gabor expansion using non minimal dual Gabor windows. 650-653 - Haggai Kfir, Ido Kanter:
Efficient LDPC codes for joint source-channel coding. 654-657 - Alexander Fish, Vladislav Mosheyev, Vitali Linkovsky, Orly Yadid-Pecht:
Ultra low-power DFF based shift registers design for CMOS image sensors applications. 658-661
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