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ORCIDIEEE Transactions on Computers, Volume 37
Volume 37, Number 1, January 1988
- B. John Oommen
, Daniel C. Y. Ma:
Deterministic Learning Automata Solutions to the Equipartitioning Problem. 2-13 - Takashi Nanya, Toshiaki Kawamura:
Error/Secure/Propagating Concept and its Application to the Design of Strongly Fault-Secure Processors. 14-24 - Ambuj Goyal, Asser N. Tantawi:
A Measure of Guaranteed Availability and its Numerical Evaluation. 25-32 - Kai Hwang, Zhiwei Xu:
Multipipeline Networking for Compound Vector Processing. 33-47 - Shahid H. Bokhari:
Partitioning Problems in Parallel, Pipelined, and Distributed Computing. 48-57 - Michel Dubois:
Throughput Analysis of Cache-Based Multiprocessors with Multiple Buses. 58-70 - Steven E. Kreutzer, S. Louis Hakimi:
Distributed Diagnosis and the System User. 71-78 - Ghislaine Thuau, Gabriele Saucier:
Optimized Layout of MOS Cells. 79-87 - James C. Harden, Noel R. Strader II:
Architectural Yield Optimization for WSI. 88-110
- Eduard Cerny, Jan Gecsei:
Functional Description of Connector-Switch-Attenuator Networks. 111-114 - Mario Blaum, Rodney M. Goodman, Robert J. McEliece:
The Reliability of Single-Error Protected Computer Memories. 114-119 - Yong J. Kang, James H. Herzog, John D. Spragins:
FISHNET: A Distributed Architecture for High-Performance Local Computer Networks. 119-123 - William K. Stewart, Stephen A. Ward:
A Solution to a Special Case of the Synchronization Problem. 123-125
Volume 37, Number 2, February 1988
- J. Greg Nash, Siegfried Hansen:
Modified Faddeeva Algorithm for Concurrent Execution of Linear Algebraic Operations. 129-137 - Kenneth Steiglitz, Irfan Kamal, Arthur Watson:
Embedding Computation in One-Dimensional Automata by Phase Coding Solitons. 138-145 - Lui Sha, John P. Lehoczky, E. Douglas Jensen:
Modular Concurrency Control and Failure Recovery. 146-159 - Aamer Mahmood, Edward J. McCluskey:
Concurrent Error Detection Using Watchdog Processors - A Survey. 160-174 - Che-Liang Yang, Gerald M. Masson:
Hybrid Fault Diagnosability with Unreliable Communcation Links. 175-181 - Raphael Rom, Nachum Shacham:
A Reconfiguration Algorithm for a Double-Loop Token-Ring Local Area Network. 182-189 - Fred J. Taylor, Rabinder Gill, Jim Joseph, Jeff Radke:
A 20 Bit Logarithmic Number System Processor. 190-200 - Woei Lin, Chuan-lin Wu:
A Distributed Resource Management Mechanism for a Partitionable Multiprocessor System. 201-210 - David C. Fisher:
Your Favorite Parallel Algorithms Might Not Be as Fast as You Think. 211-213 - Michael H. Woodbury, Kang G. Shin:
Performance Modeling and Measurement of Real-Time Multiprocessors with Time-Shared Buses. 214-224
- C. L. Chen:
Exhaustive Test Pattern Generation Using Cyclic Codes. 225-228 - Cheng Hsien Tung, John P. Robinson:
A Fast Algorithm for Optimum Syndrome Space Compression. 228-232 - Dharma P. Agrawal, Sung-Chun Kim, Nikunja K. Swain:
Analysis and Design of Nonequivalent Multistage Interconnection Networks.. 232-237 - Krzysztof Walczak:
Deductive Fault Simulation for Sequential Module Circuits. 237-239 - K. V. S. Ramarao:
Distributed Sorting on Local Area Networks. 239-243 - Barton P. Miller:
DPM: A Measurement System for Distributed Programs. 243-248 - Seyed H. Hosseini, Jon G. Kuhl, Sudhakar M. Reddy:
On Self-Fault Diagnosis of the Distributed Systems. 248-251 - Shing-Tsaan Huang, Satish K. Tripathi:
Self-Routing Technique in Perfect-Shuffle Networks Using Control Tags. 251-256
Volume 37, Number 3, March 1988
- Nikolaos Gaitanis:
The Design of TSC Error C/D Circuits for SEC/DED Codes. 258-265 - Trieu-Kien Truong, Irving S. Reed, In-Shek Hsu, Hsuen-Chyun Shyu, Howard M. Shao:
A Pipeline Design of a Fast Prime Factor DFT on a Finite Field. 266-273 - Shinji Nakamura, Kai-Yu Chu:
A Single Chip Parallel Multiplier by MOS Technology. 274-282 - Brian C. McKinney, Fayez El Guibaly:
A Multiple-Access Pipeline Architecture for Digital Signal Processing. 283-290 - Jacob Savir, William H. McAnney:
Random Pattern Testability of Delay Faults. 291-300 - Antonis M. Paschalis, Dimitris Nikolos, Constantine Halatsis:
Efficient Modular Design of TSC Checkers for M-out-of-2M Codes. 301-309 - Daniel M. Dias, Balakrishna R. Iyer, Philip S. Yu:
Tradeoffs Between Coupling Small and Large Processors for Transaction Processing. 310-320 - F. Warren Burton:
Storage Management in Virtual Tree Machines. 321-328 - Marina C. Chen:
The Generation of a Class of Multipliers: Synthesizing Highly Parallel Algorithms in VLSI. 329-338 - Philip S. Yu, C. Mani Krishna, Yann-Hang Lee:
Optimal Design and Sequential Analysis of VLSI Testing Strategy. 339-347
- Suchai Thanawastien, Pradip K. Srimani:
The Universality of a Class of Modified Single-Stage Shuffle/Exchange Networks. 348-352 - Cauligi S. Raghavendra, Viktor K. Prasanna, Salim Hariri:
Reliability Analysis in Distributed Systems. 352-358 - Prathima Agrawal:
Fault Tolerance in Multiprocessor Systems without Dedicated Redundancy. 358-362 - Eric Regener:
A Transition Sequence Generator for RAM Fault Detection. 362-368 - De-Lei Lee, Wayne A. Davis:
An O(n+k) Algorithm for Ordered Retrieval from an Associative Memory. 368-371 - Udai Garg, Yo-Ping Huang:
Decomposing Banyan Networks for Performance Analysis. 371-376 - Stavros A. Koubias, George D. Papadopoulos:
Further Results on the Performance Evaluation of the Split Channel Reservation Multiple Access Protocol ATP-2 for Local Area Networks. 376-383
Volume 37, Number 4, April 1988
- Gregory F. Sullivan:
An O(t3 + |E|) Fault Identification Algorithm for Diagnosable Systems. 388-397 - Roger M. Kieckhafer, Chris J. Walter, Alan M. Finn, Philip M. Thambidurai:
The MAFT Architecture for Distributed Fault Tolerance. 398-405 - R. M. Smith, Kishor S. Trivedi, A. V. Ramesh:
Performability Analysis: Measures, an Algorithm, and a Case Study. 406-417 - Paul Ammann, John C. Knight:
Data Diversity: An Approach to Software Fault Tolerance. 418-425 - Niraj K. Jha:
Multiple Stuck-Open Fault Detection in CMOS Logic Circuits. 426-432 - Der Jei Lin, Bella Bose:
Theory and Design of t-Error Correcting and d(d > t)-Unidirectional Error Detecting (t-EC d-UED) Codes. 433-439 - Nagesh Vasanthavada, Peter N. Marinos:
Synchronization of Fault-Tolerant Clocks in the Presence of Malicious Failures. 440-448
- Hosame Abu-Amara:
Fault-Tolerant Distributed Algorithm for Election in Complete Networks. 449-453 - Mario Blaum:
Systematic Unidirectional Burst Detecting Codes. 453-457 - Nian-Feng Tzeng, Pen-Chung Yew, Chuan-Qi Zhu:
Realizing Fault-Tolerant Interconnection Networks via Chaining. 458-462 - Michael C. Howells, Vinod K. Agarwal:
A Reconfiguration Scheme for Yield Enhancement of Large Area Binary Tree Architectures. 463-468 - Dong Sam Ha, Sudhakar M. Reddy:
On the Design of Pseudoexhaustive Testable PLA's. 468-472 - Fred J. Meyer, Dhiraj K. Pradhan:
Flip-Trees: Fault-Tolerant Graphs with Wide Containers. 472-478 - Mei-Chen Hsueh, Ravishankar K. Iyer, Kishor S. Trivedi:
Performability Modeling Based on Real Data: A Case Study. 478-484 - Jois Malathi Char, Vladimir Cherkassky, Harry Wechsler, George Lee Zimmerman:
Distributed and Fault-Tolerant Computation for Retrieval Tasks Using Distributed Associative Memories. 484-490 - Pierre L'Ecuyer, Jacques Malenfant:
Computing Optimal Checkpointing Strategies for Rollback and Recovery Systems. 491-496 - P. Golan, Ondrej Novák, Jan Hlavicka:
Pseudoexhaustive Test Pattern Generator with Enhanced Fault Coverage. 496-500 - John F. Meyer, Lu Wei:
Influence of Workload on Error Recovery in Random Access Memories. 500-507
Volume 37, Number 5, May 1988
- Andris Padegs, Brian B. Moore, Ronald M. Smith, Werner Buchholz:
The IBM System/370 Vector Architecture: Design Considerations. 509-520 - James B. Sinclair:
Optimal Assignments in Broadcast Networks. 521-531 - Giovanni Chiola, Marco Ajmone Marsan, Gianfranco Balbo:
Product-Form Solution Techniques for the Performance Analysis of Multiple-Bus Multiprocessor Systems with Nonuniform Memory References. 532-540 - B. R. Badrinath, Krithi Ramamritham:
Synchronizing Transactions on Objects. 541-547 - Jing-Yang Jou, Jacob A. Abraham:
Fault-Tolerant FFT Networks. 548-561 - James E. Smith, Andrew R. Pleszkun:
Implementing Precise Interrupts in Pipelined Processors. 562-573 - Kyungsook Y. Lee, Daeshik Lee:
On the Augmented Data Manipulator Network in SIMD Environments. 574-584 - Akira Fukuda:
Equilibrium Point Analysis of Memory Interference in Multiprocessor Systems. 585-593 - Michael R. Fellows, Michael A. Langston:
Processor Utilization in a Linearly Connected Parallel Processing System. 594-603
- Howard P. Katseff:
Incomplete Hypercubes. 604-608 - James W. Watterson, Jill J. Hallenbeck:
Modulo 3 Residue Checker: New Results on Performance and Cost. 608-612 - Suresh C. Kothari, G. M. Prabhu, Robert S. Roberts:
The Kappa Network with Fault-Tolerant Destination Tag Algorithm. 612-617 - Yoon-Hwa Choi, Miroslaw Malek:
A Fault-Tolerant FFT Processor. 617-621 - Yoon-Hwa Choi, Miroslaw Malek:
A Fault-Tolerant Systolic Sorter. 621-624 - K. C. Chang, David Hung-Chang Du:
Layer Assignment Problem for Three-Layer Routing. 625-632 - Prithviraj Banerjee:
The Cubical Ring Connected Cycles: A Fault-Tolerant Parallel Computation Network. 632-636
Volume 37, Number 6, June 1988
- Wing Shing Wong, Robert J. T. Morris:
Benchmark Synthesis Using the LRU Cache Hit Function. 637-645 - Patrick M. Lenders:
A Generalized Message-Passing Mechanism for Communicating Sequential Processes. 646-651 - Lance A. Glasser, Charles A. Zukowski:
Continuous Models for Communication Density Constraints on Multiprocessor Performance. 652-656 - Peter R. Cappello, Willard L. Miranker:
Systolic Super Summation. 657-677 - Nohbyung Park, Alice C. Parker:
Theory of Clocking for Maximum Execution Overlap of High-Speed Digital Systems. 678-690 - Insup Lee, David Smitley:
A Synthesis Algorithm for Reconfigurable Interconnection Networks. 691-699 - Kimming So, Rudolph N. Rechtschaffen:
Cache Operations by MRU Change. 700-709 - David K. Probst, Hon Fung Li:
Abstract Specification of Synchronous Data Types for VLSI and Proving the Correctness of Systolic Network Implementations. 710-720
- David Hung-Chang Du, Oscar H. Ibarra, J. Fernando Naveda:
On Two-Dimensional Via Assignment for Single-Row Routing. 721-727 - Jik H. Chang, Oscar H. Ibarra, Moon-Jung Chung, Kotesh K. Rao:
Systolic Tree Implementation of Data Structures. 727-735 - In-Shek Hsu, Trieu-Kien Truong, Leslie J. Deutsch, Irving S. Reed:
A Comparison of VLSI Architecture of Finite Field Multipliers Using Dual, Normal, or Standard Bases. 735-739 - Randolf D. Nelson, Asser N. Tantawi:
Approximate Analysis of Fork/Join Synchronization in Parallel Queues. 739-743 - Mansour I. Irshid:
A Simple Method for Determining Hadamard Sequency Vectors. 743-745 - Ingrid Jansch, Bernard Courtois:
Definition and Design of Strongly Language Disjoint Checkers. 745-748 - Bing Bing Zhou:
A New Bit-Serial Systolic Multiplier Over GF(2m). 749-751 - Michael Nicolaidis, Bernard Courtois:
Strongly Code Disjoint Checkers. 751-756 - Vijay Pitchumani, Satish S. Soman:
Functional Test Generation Based on Unate Function Theory. 756-760 - Leonard A. Ferrari, P. V. Sankar:
Minimum Complexity FIR Filters and Sparse Systolic Arrays. 760-764 - Qing Yang, Safwat G. Zaky:
Communication performance in multiple-bus systems. 848-853 - Charles R. Bisbee, Victor P. Nelson:
Failure dependent bandwidth in shuffle-exchange networks. 853-858 - Thanos Stouraitis, Fred J. Taylor:
Floating-point to logarithmic encoder error analysis. 858-863 - Yinghua Min, Jintao Li:
Strongly fault secure PLAs and totally self-checking checkers. 863-867 - Yousef Saad, Martin H. Schultz:
Topological properties of hypercubes. 867-872 - Shambhu J. Upadhyaya, Kewal K. Saluja:
An experimental study to determine task size for rollback recovery systems. 872-877 - Adly T. Fam:
Efficient complex matrix multiplication. 877-879 - Dali L. Tao, Carlos R. P. Hartmann, Parag K. Lala:
An efficient class of unidirectional error detecting/correcting codes. 879-882 - Michael S. Wainer:
Generating fractal-like surfaces on general purpose mesh-connected computers. 882-886 - Ronald J. Cosentino:
Fault tolerance in a systolic residue arithmetic processor array. 886-890
Volume 37, Number 7, July 1988
- Micah Beck, Dina Bitton, W. Kevin Wilkinson:
Sorting Large Files on a Backend Multiprocessor. 769-778 - Beverly A. Sanders:
An Asynchronous, Distributed Flow Control Algorithm for Rate Allocation in Computer Networks. 779-787 - Israel Gazit, Miroslaw Malek:
Fault Tolerance Capabilities in Multistage Network-Based Multicomputer Systems. 788-798 - Yoshinori Yamamoto, Masao Mukaidono:
Meaningful Special Classes of Ternary Logic Functions - Regular Ternary Logic Functions and Ternary Majority Functions. 799-806 - Dimitris Nikolos, Antonis M. Paschalis, George Philokyprou:
Efficient Design of Totally Self-Checking Checkers for all Low-Cost Arithmetic Codes. 807-814 - Chuang Lin, Dan C. Marinescu:
Stochastic High-Level Petri Nets and Applications. 815-825 - Wu-Yeh Cheng, Jane W.-S. Liu:
Performance of ARQ Schemes in Token Ring Networks. 826-834 - Christian Berthet, Eduard Cerny:
An Algebraic Model for Asynchronous Circuits Verification. 835-847
Volume 37, Number 8, August 1988
- Richard F. Rashid, Avadis Tevanian, Michael Young, David B. Golub, Robert V. Baron, David L. Black, William J. Bolosky, Jonathan Chew:
Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures. 896-907 - Charles P. Thacker, Lawrence C. Stewart, Edwin H. Satterthwaite:
Firefly: A Multiprocessor Workstation. 909-920 - Sudhir Ahuja, Nicholas Carriero, David Gelernter, Venkatesh Krishnaswamy:
Matching Language and Hardware for Parallel Computation in the Linda Machine. 921-929 - Roberto Bisiani, Alessandro Forin:
Multilanguage Parallel Programming of Heterogeneous Machines. 930-945 - Yi-Hsiu Wei, Jean-Luc Gaudiot:
Demand-Driven Interpretation of FP Programs on a Data-Flow Multiprocessor. 946-966 - Robert P. Colwell, Robert P. Nix, John J. O'Donnell, David B. Papworth, Paul K. Rodman:
A VLIW Architecure for a Trace Scheduling Compiler. 967-979 - Daniel J. Magenheimer, Liz Peters, Karl Pettis, Dan Zuras:
Integer Multiplication and Division on the HP Precision Architecture. 980-990 - Constantine D. Polychronopoulos:
Compiler Optimizations for Enhancing Parallelism and Their Impact on Architecture Design. 991-1004
Volume 37, Number 9, September 1988
- Fred U. Rosenberger, Charles E. Molnar, Thomas J. Chaney, Ting-Pien Fang:
Q-Modules: Internally Clocked Delay-Insensitive Modules. 1005-1018 - Menkae Jeng, Howard Jay Siegel:
Design and Analysis of Dynamic Redundancy Networks. 1019-1029 - Thomas E. Fuja, Chris Heegard, Rodney M. Goodman:
Linear Sum Codes for Random Access Memories. 1030-1042 - Thomas J. Brosnan, Noel R. Strader II:
Modular Error Detection for Bit-Serial Multiplication. 1043-1052 - Kang G. Shin, Tein-Hsiang Lin:
Modeling and Measurement of Error Propagation in a Multimodule Computing System. 1053-1066 - Beverly A. Sanders:
An Incentive Compatible Flow Control Algorithm for Rate Allocation in Computer Networks. 1067-1072 - David M. Nicol, Joel H. Saltz:
Dynamic Remapping of Parallel Computations with Varying Resource Demands. 1073-1087 - Manoj Kumar:
Measuring Parallelism in Computation-Intensive Scientific/Engineering Applications. 1088-1098 - Gary L. Craig, Charles R. Kime, Kewal K. Saluja:
Test Scheduling and Control for VLSI Built-In Self-Test. 1099-1109
- Robert W. Doran:
Variants of an Improved Carry Look-Ahead Adder. 1110-1113 - Bernd Becker:
Efficient Testing of Optimal Time Adders. 1113-1121 - Sudhir Dhawan, Ronald C. de Vries:
Design of Self-Checking Iterative Networks. 1121-1125 - Edmundo de Souza e Silva, Richard R. Muntz:
Simple Relationships Among Moments of Queue Lengths in Product Form Queueing Networks. 1125-1129 - K. S. Ramanatha, Nripendra N. Biswas:
Design of Crosspoint-Irredundant PLA's Using Minimal Number of Control Inputs. 1130-1134 - Donald A. Calahan:
An Analysis of Vector Startup Access Delays. 1134-1137 - Patrick W. Dowd, Kamal Jabbour:
Spanning Multiaccess Channel Hypercube Computer Interconnection. 1137-1142 - William H. McAnney, Jacob Savir:
Built-In Checking of the Correct Self-Test Signature. 1142-1145 - G. F. Taylor, Randy H. Steinvorth, Jack F. McDonald:
An Architecture for a Video Rate Two-Dimensional Fast Fourier Transform Processor. 1145-1148 - Douglas B. West, Prithviraj Banerjee:
On the Construction of Communication Networks Satisfying Bounded Fan-In of Service Ports. 1148-1151 - Sudhakar M. Reddy, Kewal K. Saluja, Mark G. Karpovsky:
A Data Compression Technique for Built-In Self-Test. 1151-1156 - Yaron I. Gold, Shlomo Moran:
Estimating Metrical Change in Fully Connected Mobile Networks - A Least Upper Bound on the Worst Case. 1156-1162
Volume 37, Number 10, October 1988
- Li-Shin Lin, Sartaj Sahni:
Maximum Alignment of Interchageable Terminals. 1166-1177 - N. Chandrasekharan, S. Sitharama Iyengar:
NC Algorithms for Recognizing Chordal Graphs and k Trees. 1178-1183 - Craig G. Prohazka:
Bounding the Maximum Size of a Packet Radio Network. 1184-1190 - M. Ümit Uyar, Anthony P. Reeves:
Dynamic Fault Reconfiguration in a Mesh-Connected MIMD Environment. 1191-1205 - Nikolaos Gaitanis:
Totally Self-Checking Checkers with Separate Internal Fault Indication. 1206-1213 - Andrew Hopper, Roger M. Needham:
The Cambridge Fast Ring Networking System. 1214-1223 - Vernon Rego, Lionel M. Ni:
Analytic Models of Cyclic Service Systems and Their Application to Token-Passing Local Networks. 1224-1234 - Najmi T. Jarwala, Dhiraj K. Pradhan:
TRAM: A Design Methodology for High-Performance, Easily Testable, Multimegabit RAM's. 1235-1250 - Gianfranco Balbo, Steven C. Bruell, Subbarao Ghanta:
Combining Queueing Networks and Generalized Stochastic Petri Nets for the Solution of Complex Models of System Behavior. 1251-1268
- Vladimir Cherkassky:
Performance Evaluation of Neurectangular Multistage Interconnection Networks. 1269-1272 - Howard M. Shao, Irving S. Reed:
On the VLSI Design of a Pipeline Reed-Solomon Decoder Using Systolic Arrays. 1273-1280 - Sudhir Dhawan, Ronald C. de Vries:
Design of Self-Checking Sequential Machines. 1280-1285 - Mee Yee Chan, Francis Y. L. Chin:
On Embedding Rectangular Grids in Hypercubes. 1285-1288 - Li Shen, Stephen Y. H. Su:
A Functional Testing Method for Microprocessors. 1288-1293 - Kwang-Ya Fang, Anthony S. Wojcik:
Modular Decomposition of Combinational Multiple-Valued Circuits. 1293-1301 - Laung-Terng Wang, Edward J. McCluskey:
Linear Feedback Shift Register Design Using Cyclic Codes. 1302-1306 - Mikhail J. Atallah:
On Multidimensional Arrays of Processors. 1306-1309 - Daniel Brand, Vijay S. Iyengar:
Timing Analysis Using Functional Analysis. 1309-1315 - David A. Carlson:
Modified Mesh-Connected Parallel Computers. 1315-1321 - David S. Scott, Joe Brandenburg:
Minimal mesh embeddings in binary hypercubes. 1284-1285 - David M. Mandelbaum:
On subsequences of arithmetic sequences. 1314-1315
Volume 37, Number 11, November 1988
- Subhasis Laha, Janak H. Patel, Ravishankar K. Iyer:
Accurate Low-Cost Methods for Performance Evaluation of Cache Memory Systems. 1325-1336 - Clyde P. Kruskal, Marc Snir, Alan Weiss:
The Distribution of Waiting Times in Clocked Multistage Interconnection Networks. 1337-1352 - Dalibor F. Vrsalovic, Daniel P. Siewiorek, Zary Segall, Edward F. Gehringer:
Performance Prediction and Calibration for a Class of Multiprocessors. 1353-1365 - David Bernstein, Haran Boral, Ron Y. Pinter:
Optimal Chaining in Expression Trees. 1366-1374 - Jiro Naganuma, Takeshi Ogura, Shin-Ichiro Yamada, Takashi Kimura:
High-Speed CAM-Based Architecture for a Prolog Machine (ASCA). 1375-1383 - Virginia Mary Lo:
Heuristic Algorithms for Task Assignment in Distributed Systems. 1384-1397 - Adit D. Singh:
Interstitial Redundancy: An Area Efficient Fault Tolerance Scheme for Large Area VLSI Processor Arrays. 1398-1410
- Peter C. Maxwell:
Comparative Analysis of Different Implementations of Multiple-Input Signature Analyzers. 1411-1414 - Jerzy Tyszer:
A Multiple Fault-Tolerant Processor Network Architecture for Pipeline Computing. 1414-1418 - Henryk Krawczyk, Wojciech E. Kozlowski:
On the Diagnosability of Multicomputer Systems with Homogeneous and Incomplete Tests. 1419-1422 - Uwe Schwiegelshohn, Lothar Thiele:
A Systolic Array for the Assignment Problem. 1422-1425 - Petra De Jong, Ad J. van de Goor:
Test Pattern Generation for API Faults in RAM. 1426-1428 - Ferng-Ching Lin, I-Chen Wu:
Broadcast Normalization in Systolic Design. 1428-1434 - Franklin T. Luk, Haesun Park:
Fault-Tolerant Matrix Triangularizations on Systolic Arrays. 1434-1438 - Wen-Tsuen Chen, Jang-Ping Sheu:
Performance Analysis of Multistage Interconnection Networks with Hierarchical Requesting Model. 1438-1442 - Yoshinori Yamamoto, Shiro Fujita:
Relationship Between P-Valued Majority Functions and P-Valued Threshold Functions. 1442-1445 - Kyungsook Y. Lee, Wael Hegazy:
The Extra Stage Gamma Network. 1445-1450 - Nikolaos Gaitanis:
The Design of Totally Self-Checking TMR Fault-Tolerant Systems. 1450-1454 - Ahmed K. Elmagarmid, Ajoy Kumar Datta:
Two-Phase Deadlock Detection Algorithm. 1454-1458 - Nathalie Homobono, Claudine Peyrat:
Connectivity of Imase and Itoh Digraphs. 1459-1461 - S. Aborhey:
Binary Decision Tree Test Functions. 1461-1465 - Kang G. Shin, Parameswaran Ramanathan:
Transmission Delays in Hardware Clock Synchronization. 1465-1467 - David B. Skillicorn:
A New Class of Fault-Tolerant Static Interconnection Networks. 1468-1470 - Behrooz Parhami:
Carry-Free Addition of Recorded Binary Signed-Digit Numbers. 1470-1476 - Che-Liang Yang, Gerald M. Masson:
A Distributed Algorithm for Fault Diagnosis in Systems with Soft Failures. 1476-1480 - Donatella Sciuto, Fabrizio Lombardi:
On Functional Testing of Array Processors. 1480-1484
Volume 37, Number 12, December 1988
- William E. Weihl:
Commutativity-Based Concurrency Control for Abstract Data Types. 1488-1505 - Bard Bloom:
Constructing Two-Writer Atomic Registers. 1506-1514 - Mark G. Staskauskas:
The Formal Specification and Design of a Distributed fElectronic Funds-Transfer System. 1515-1528 - Greg N. Frederickson, Ravi Janardan:
Space-Efficient and Fault-Tolerant Message Routing in Outerplanar Networks. 1529-1540 - Brian A. Coan:
A Compiler that Increases the Fault Tolerance of Asynchronous Protocols. 1541-1553 - Cevdet Aykanat, Füsun Özgüner, Fikret Erçal, P. Sadayappan:
Iterative Algorithms for Solution of Large Sparse Systems of Linear Equations on Hypercubes. 1554-1568 - Pradip Bose:
A Novel Technique for Efficient Parallel Implementation of a Classical Logic/Fault Simulation Problem. 1569-1577 - PeiZong Lee, Zvi M. Kedem:
Synthesizing Linear Array Algorithms from Nested For Loop Algorithms. 1578-1598 - Cynthia J. Anfinson, Franklin T. Luk:
A Linear Algebraic Model of Algorithm-Based Fault Tolerance. 1599-1604 - Russ Miller, Quentin F. Stout:
Efficient Parallel Convex Hull Algorithms. 1605-1618 - Rhys S. Francis, Ian D. Mathieson:
A Benchmark Parallel Sort for Shared Memory Multiprocessors. 1619-1626
- Rakesh Agrawal, H. V. Jagadish:
Partitioning Techniques for Large-Grained Parallelism. 1627-1634 - P. Sadayappan, V. Visvanathan:
Circuit Simulation on Shared-Memory Multiprocessors. 1634-1642 - Russ Miller, Quentin F. Stout:
Simulating Essential Pyramids. 1642-1648 - Timothy A. Davis, Edward S. Davidson:
Pairwise Reduction for the Direct, Parallel Solution of Sparse, Unsymmetric Sets of Linear Equations. 1648-1654 - Parameswaran Ramanathan, Kang G. Shin:
Reliable Broadcast in Hypercube Multicomputers. 1654-1657 - V. Nageshwara Rao, Vipin Kumar:
Concurrent Access of Priority Queues. 1657-1665 - Virendra K. Janakiram, Dharma P. Agrawal, Ravi Mehrotra:
A Randomized Parallel Backtracking Algorithm. 1665-1676
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