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ORCIDKirill Minkovich
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2010 – 2019
- 2014
[j5]Kirill Minkovich, Corey M. Thibeault, Michael John O'Brien, Aleksey Nogin
, Youngkwan Cho, Narayan Srinivasa:
HRLSim: A High Performance Spiking Neural Network Simulator for GPGPU Clusters. IEEE Trans. Neural Networks Learn. Syst. 25(2): 316-331 (2014)- 2013
- [j4]Corey M. Thibeault, Kirill Minkovich, Michael John O'Brien, Frederick C. Harris Jr., Narayan Srinivasa:
Efficiently passing messages in distributed spiking neural network simulation. Frontiers Comput. Neurosci. 7: 77 (2013) - [j3]Joshua Baron, Karim El Defrawy, Kirill Minkovich, Rafail Ostrovsky, Eric Tressler:
5PM: Secure pattern matching. J. Comput. Secur. 21(5): 601-625 (2013) - 2012
- [j2]Kirill Minkovich, Narayan Srinivasa, Jose M. Cruz-Albrecht, Youngkwan Cho, Aleksey Nogin:
Programming Time-Multiplexed Reconfigurable Hardware Using a Scalable Neuromorphic Compiler. IEEE Trans. Neural Networks Learn. Syst. 23(6): 889-901 (2012) - [c7]Joshua Baron, Karim El Defrawy, Kirill Minkovich, Rafail Ostrovsky, Eric Tressler:
5PM: Secure Pattern Matching. SCN 2012: 222-240 - [i1]Joshua Baron, Karim El Defrawy, Kirill Minkovich, Rafail Ostrovsky, Eric Tressler:
5PM: Secure Pattern Matching. IACR Cryptol. ePrint Arch. 2012: 698 (2012) - 2010
- [c6]Jason Cong, Kirill Minkovich:
LUT-based FPGA technology mapping for reliability. DAC 2010: 517-522 - [c5]Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, Kirill Minkovich, Bo Yuan, Yi Zou:
Accelerating Monte Carlo based SSTA using FPGA. FPGA 2010: 111-114 - [c4]Jason Cong, Kirill Minkovich:
LUT-based FPGA technology mapping for reliability (abstract only). FPGA 2010: 288
2000 – 2009
- 2008
- [c3]Kirill Minkovich, Jason Cong:
Mapping for better than worst-case delays in LUT-based FPGA designs. FPGA 2008: 56-64 - 2007
- [j1]Jason Cong, Kirill Minkovich:
Optimality Study of Logic Synthesis for LUT-Based FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(2): 230-239 (2007) - [c2]Jason Cong, Kirill Minkovich:
Improved SAT-based Boolean matching using implicants for LUT-based FPGAs. FPGA 2007: 139-147 - 2006
- [c1]Jason Cong, Kirill Minkovich:
Optimality study of logic synthesis for LUT-based FPGAs. FPGA 2006: 33-40
Coauthor Index
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