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2020 – today
- 2024
[j64]Vahid Eftekhari Moghadam
, Gabriele Serra, Federico Aromolo, Giorgio C. Buttazzo, Paolo Prinetto:
Memory Integrity Techniques for Memory-Unsafe Languages: A Survey. IEEE Access 12: 43201-43221 (2024)- 2023
- [c212]Gabriele Costa, Silvia de Francisci, Serenella Valiani, Paolo Prinetto:
Why Mary Can Hack: Effectively Introducing High School Girls to Cybersecurity. ARES 2023: 71:1-71:8 - [c211]Nicolò Maunero, Fabio De Rosa, Paolo Prinetto:
Towards Cybersecurity Risk Assessment Automation: an Ontological Approach. DASC/PiCom/CBDCom/CyberSciTech 2023: 628-635 - [c210]Mahboobe Sadeghipour Roodsari, Fatemeh Sheikhshoaei, Nicolò Maunero, Paolo Prinetto, Zain Navabi:
LiFi-CFI: Light-weight Fine-grained Hardware CFI Protection for RISC-V. DTTIS 2023: 1-6 - 2022
- [j63]Fabio De Rosa, Nicolò Maunero, Paolo Prinetto, Federico Talentino, Martina Trussoni:
ThreMA: Ontology-Based Automated Threat Modeling for ICT Infrastructures. IEEE Access 10: 116514-116526 (2022) - [c209]Vahid Eftekhari Moghadam, Paolo Prinetto, Gianluca Roascio:
Real-Time Control-Flow Integrity for Multicore Mixed-Criticality IoT Systems. ETS 2022: 1-4 - [c208]Gianluca Roascio, Samuele Yves Cerini, Paolo Prinetto:
Remotizing and Virtualizing Chips and Circuits for Hardware-based Capture-the-Flag Challenges. EuroS&P Workshops 2022: 477-485 - [c207]Fabio De Rosa, Nicolò Maunero, Luca Nicoletti, Paolo Prinetto, Martina Trussoni:
Ontology for Cybersecurity Governance of ICT Systems. ITASEC 2022: 52-63 - [c206]Mahboobe Sadeghipour Roodsari, Ebrahim Nouri, Fatemeh Sheikhshoaei, Paolo Prinetto, Zainalabedin Navabi:
A Secure Canary-Based Hardware Approach Against ROP. ITASEC 2022: 64-75 - 2021
- [c205]Vahid Eftekhari Moghadam, Marco Meloni, Paolo Prinetto:
Control-Flow Integrity for Real-Time Operating Systems: Open Issues and Challenges. EWDTS 2021: 1-6 - [c204]Maryam Rajabalipanah, Mahboobe Sadeghipour Roodsari, Zahra Jahanpeima, Gianluca Roascio, Paolo Prinetto, Zainalabedin Navabi:
AFTAB: A RISC-V Implementation with Configurable Gateways for Security. EWDTS 2021: 1-6 - [c203]Giulio Berra, Gaspare Ferraro, Matteo Fornero, Nicolò Maunero, Paolo Prinetto, Gianluca Roascio:
PAIDEUSIS: A Remote Hybrid Cyber Range for Hardware, Network, IoT Security Training. ITASEC 2021: 284-297 - 2020
- [c202]Nicolò Maunero, Paolo Prinetto, Gianluca Roascio, Antonio Varriale:
A FPGA-based Control-Flow Integrity Solution for Securing Bare-Metal Embedded Systems. DTIS 2020: 1-10 - [c201]Matteo Fornero, Nicolò Maunero, Paolo Prinetto, Antonio Varriale:
SEkey: A Distributed Hardware-based Key Management System. EWDTS 2020: 1-7 - [c200]Paolo Prinetto, Gianluca Roascio, Antonio Varriale:
Hardware-based Capture-The-Flag Challenges. EWDTS 2020: 1-8 - [c199]Shabeer Ahmad, Nicolò Maunero, Paolo Prinetto:
EVA: A Hybrid Cyber Range. ITASEC 2020: 12-23 - [c198]Paolo Prinetto, Gianluca Roascio:
Hardware Security, Vulnerabilities, and Attacks: A Comprehensive Taxonomy. ITASEC 2020: 177-189 - [c197]Francesca Sorgini, Giuseppe Airò Farulla, Nikola Lukic, Ivan Danilov, Loris Roveda, Milos Milivojevic, Terrin Babu Pulikottil, Maria Chiara Carrozza, Paolo Prinetto, Tullio Tolio, Calogero Maria Oddo, Petar B. Petrovic, Bozica Bojovic:
Tactile sensing with gesture-controlled collaborative robot. MetroInd4.0&IoT 2020: 364-368
2010 – 2019
- 2019
- [j62]Elena Ioana Vatajelu, Paolo Prinetto, Mottaqiallah Taouil, Said Hamdioui:
Challenges and Solutions in Emerging Memory Testing. IEEE Trans. Emerg. Top. Comput. 7(3): 493-506 (2019) - [j61]Bishwajeet Pandey, Giuseppe Airo Farulla, Marco Indaco, Ludovico Iovino, Paolo Prinetto:
Design and Review of Water Management System Using Ethernet, Wi-Fi 802.11n, Modbus, and Other Communication Standards. Wirel. Pers. Commun. 106(4): 1677-1699 (2019) - [c196]Nicolò Maunero, Paolo Prinetto, Gianluca Roascio:
CFI: Control Flow Integrity or Control Flow Interruption? EWDTS 2019: 1-6 - 2018
- [j60]Alessandro Cilardo, Nicola Mazzocca, Paolo Prinetto:
An abstraction layer enabling pervasive hardware-reconfigurable systems. Int. J. Embed. Syst. 10(5): 366-377 (2018) - [c195]Alberto Carelli, Carlo Alberto Cristofanini, Alessandro Vallero, Cataldo Basile, Paolo Prinetto, Stefano Di Carlo:
Securing bitstream integrity, confidentiality and authenticity in reconfigurable mobile heterogeneous systems. AQTR 2018: 1-6 - 2017
- [c194]Giuseppe Airo Farulla, Paolo Prinetto, Antonio Varriale:
Holistic security via complex HW/SW platforms. DTIS 2017: 1-6 - [c193]Cleo Sgouropoulou, Ioannis Voyiatzis, Anastasios Koutoumanos, Said Hamdioui, Peyman Pouyan, M. Comte, Paolo Prinetto, Giuseppe Airo Farulla, Peeter Ellervee, Carlos Delgado Kloos, Raquel M. Crespo García:
Standards-based tools and services for building lifelong learning pathways. EDUCON 2017: 1619-1621 - [c192]Mathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre, Paolo Prinetto, Marco Restifo:
Scan chain encryption for the test, diagnosis and debug of secure circuits. ETS 2017: 1-6 - [c191]Matteo Bollo, Alberto Carelli, Stefano Di Carlo, Paolo Prinetto:
Side-channel analysis of SEcube™ platform. EWDTS 2017: 1-5 - [c190]Giuseppe Airo Farulla, Alexander James Pane, Paolo Prinetto, Antonio Varriale:
An object-oriented open software architecture for security applications. EWDTS 2017: 1-6 - [c189]Elena Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto:
Zero bit-error-rate weak PUF based on Spin-Transfer-Torque MRAM memories. IVSW 2017: 128-133 - 2016
- [j59]Elena Ioana Vatajelu, Giorgio Di Natale, Mario Barbareschi, Lionel Torres, Marco Indaco, Paolo Prinetto:
STT-MRAM-Based PUF Architecture Exploiting Magnetic Tunnel Junction Fabrication-Induced Variability. ACM J. Emerg. Technol. Comput. Syst. 13(1): 5:1-5:21 (2016) - [c188]Elena Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto:
Towards a highly reliable SRAM-based PUFs. DATE 2016: 273-276 - [c187]Antonio Varriale, Elena Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto, Pascal Trotta, Tiziana Margaria:
SEcube™: An open-source security platform in a single SoC. DTIS 2016: 1-6 - [c186]Elena Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto:
STT-MTJ-based TRNG with on-the-fly temperature/current variation compensation. IOLTS 2016: 179-184 - [c185]Elena Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto:
Security primitives (PUF and TRNG) with STT-MRAM. VTS 2016: 1-4 - 2015
- [j58]Nadeem Ahmad, Umar Shoaib, Paolo Prinetto:
Usability of Online Assistance From Semiliterate Users' Perspective. Int. J. Hum. Comput. Interact. 31(1): 55-64 (2015) - [j57]Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Davide Bertozzi, Piero Olivo:
SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(10): 1627-1638 (2015) - [j56]Davide Bertozzi, Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Piero Olivo, Paolo Prinetto, Cristian Zambelli:
Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers. ACM Trans. Embed. Comput. Syst. 14(1): 7:1-7:24 (2015) - [j55]Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta:
SATTA: A Self-Adaptive Temperature-Based TDF Awareness Methodology for Dynamically Reconfigurable FPGAs. ACM Trans. Reconfigurable Technol. Syst. 8(1): 1:1-1:22 (2015) - [j54]Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta:
SA-FEMIP: A Self-Adaptive Features Extractor and Matcher IP-Core Based on Partially Reconfigurable FPGAs for Space Applications. IEEE Trans. Very Large Scale Integr. Syst. 23(10): 2198-2208 (2015) - [c184]Elena I. Vatajelu, Rosa Rodríguez-Montañés, Marco Indaco, Michel Renovell, Paolo Prinetto, Joan Figueras:
Read/write robustness estimation metrics for spin transfer torque (STT) MRAM cell. DATE 2015: 447-452 - [c183]Elena Ioana Vatajelu, Giorgio Di Natale, Marco Indaco, Paolo Prinetto:
STT MRAM-Based PUFs. DATE 2015: 872-875 - [c182]Somayeh Sadeghi Kohan, Mehdi Kamal, John McNeil, Paolo Prinetto, Zain Navabi:
Online self adjusting progressive age monitoring of timing variations. DTIS 2015: 1-2 - [c181]Paolo Prinetto, Giorgio Di Natale:
DTIS 2015 foreword. DTIS 2015: 1 - [c180]Elena I. Vatajelu, Rosa Rodríguez-Montañés, Marco Indaco, Paolo Prinetto, Joan Figueras:
STT-MRAM cell reliability evaluation under process, voltage and temperature (PVT) variations. DTIS 2015: 1-6 - [c179]Elena I. Vatajelu, Rosa Rodríguez-Montañés, Stefano Di Carlo, Marco Indaco, Michel Renovell, Paolo Prinetto, Joan Figueras:
Power-aware voltage tuning for STT-MRAM reliability. ETS 2015: 1-6 - [c178]Stefano Di Carlo, Paolo Prinetto, Pascal Trotta, Jan Andersson:
A portable open-source controller for safe Dynamic Partial Reconfiguration on Xilinx FPGAs. FPL 2015: 1-4 - [c177]Elena Ioana Vatajelu, Giorgio Di Natale, Lionel Torres, Paolo Prinetto:
STT-MRAM-Based Strong PUF Architecture. ISVLSI 2015: 467-472 - 2014
- [j53]Stefano Di Carlo, Paolo Prinetto, Daniele Rolfo, Nicola Sansonne, Pascal Trotta:
A novel algorithm and hardware architecture for fast video-based shape reconstruction of space debris. EURASIP J. Adv. Signal Process. 2014: 147 (2014) - [j52]Umar Shoaib, Nadeem Ahmad, Paolo Prinetto, Gabriele Tiotto:
Integrating MultiWordNet with Italian Sign Language lexical resources. Expert Syst. Appl. 41(5): 2300-2308 (2014) - [j51]Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Paolo Prinetto, Davide Bertozzi, Piero Olivo, Cristian Zambelli:
FLARES: An Aging Aware Algorithm to Autonomously Adapt the Error Correction Capability in NAND Flash Memories. ACM Trans. Archit. Code Optim. 11(3): 26:1-26:25 (2014) - [j50]Nadereh Hatami, Rafal Baranowski, Paolo Prinetto, Hans-Joachim Wunderlich:
Multilevel Simulation of Nonfunctional Properties by Piecewise Evaluation. ACM Trans. Design Autom. Electr. Syst. 19(4): 37:1-37:21 (2014) - [c176]Giuseppe Airo Farulla, Marco Indaco, Paolo Prinetto, Daniele Rolfo, Pascal Trotta:
ABLUR: An FPGA-based adaptive deblurring core for real-time applications. AHS 2014: 104-111 - [c175]Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Salvatore Galfano, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi:
SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives. DATE 2014: 1-6 - [c174]Stefano Di Carlo, Marco Indaco, Paolo Prinetto, Elena I. Vatajelu, Rosa Rodríguez-Montañés, Joan Figueras:
Reliability estimation at block-level granularity of spin-transfer-torque MRAMs. DFT 2014: 75-80 - [c173]Stefano Di Carlo, Paolo Prinetto, Daniele Rolfo, Pascal Trotta:
A fault injection methodology and infrastructure for fast single event upsets emulation on Xilinx SRAM-based FPGAs. DFT 2014: 159-164 - [c172]Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Frank Reichenbach, Trond Løkstad, Gulzaib Rafiq:
On Enhancing Fault Injection's Capabilities and Performances for Safety Critical Systems. DSD 2014: 583-590 - [c171]Ioannis Voyiatzis, Michel Renovell, Mohamed Masmoudi, Paolo Prinetto, Giorgio Di Natale:
DTIS 2014 foreword. DTIS 2014: 1 - [c170]Marco Indaco, Paolo Prinetto, Elena I. Vatajelu:
On the impact of process variability and aging on the reliability of emerging memories (Embedded tutorial). ETS 2014: 1-10 - [c169]S. Arcaro, Stefano Di Carlo, Marco Indaco, D. Pala, Paolo Prinetto, Elena I. Vatajelu:
Integration of STT-MRAM model into CACTI simulator. IDT 2014: 67-72 - [c168]Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Alessandro Vallero:
A novel methodology to increase fault tolerance in autonomous FPGA-based systems. IOLTS 2014: 87-92 - [c167]Teodora Sanislav, George Dan Mois, Silviu Folea, Liviu Miclea, Giulio Gambardella, Paolo Prinetto:
A cloud-based Cyber-Physical System for environmental monitoring. MECO 2014: 6-9 - 2013
- [j49]Michele Fabiano, Marco Indaco, Stefano Di Carlo, Paolo Prinetto:
Design and optimization of adaptable BCH codecs for NAND flash memories. Microprocess. Microsystems 37(4-5): 407-419 (2013) - [c166]Stefano Di Carlo, Paolo Prinetto, Daniele Rolfo, Pascal Trotta:
AIDI: An adaptive image denoising FPGA-based IP-core for real-time applications. AHS 2013: 99-106 - [c165]Francesco Rosso, Francesco Gallo, Walter Allasia, Enrico Licata, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Alain Favetto, Marco Paleari, Paolo Ariano:
Stereo vision system for capture and removal of space debris. DASIP 2013: 201-207 - [c164]Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta:
A software-based self test of CUDA Fermi GPUs. ETS 2013: 1-6 - [c163]Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Paolo Prinetto, Daniele Rolfo, Pascal Trotta:
Dependable Dynamic Partial Reconfiguration with minimal area & time overheads on Xilinx FPGAS. FPL 2013: 1-4 - [c162]Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Piergiorgio Lanza:
FEMIP: A high performance FPGA-based features extractor & matcher for space applications. FPL 2013: 1-4 - [c161]Stefano Di Carlo, Giulio Gambardella, Trong Huynh Bao, Paolo Prinetto, Daniele Rolfo, Pascal Trotta:
ZipStream: Improving dependability in dynamic partial reconfiguration. IDT 2013: 1-6 - [c160]Stefano Di Carlo, Giulio Gambardella, Piergiorgio Lanza, Paolo Prinetto, Daniele Rolfo, Pascal Trotta:
SAFE: A self adaptive frame enhancer FPGA-based IP-core for real-time space applications. IDT 2013: 1-6 - [c159]Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Paolo Prinetto:
Ef3S: An evaluation framework for flash-based systems. IOLTS 2013: 199-204 - [c158]Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta:
Increasing the robustness of CUDA Fermi GPU-based systems. IOLTS 2013: 234-235 - [c157]Stefano Di Carlo, Giulio Gambardella, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta:
Fault mitigation strategies for CUDA GPUs. ITC 2013: 1-8 - [c156]Alessandro Cilardo, Nicola Mazzocca, Paolo Prinetto:
Exploring a New Dimension in Code Mobility for Ubiquitous Embedded Systems. UIC/ATC 2013: 56-63 - 2012
- [c155]Cristian Zambelli, Marco Indaco, Michele Fabiano, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi:
A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories. DATE 2012: 881-886 - [c154]Nadereh Hatami, Rafal Baranowski, Paolo Prinetto, Hans-Joachim Wunderlich:
Efficient system-level aging prediction. ETS 2012: 1-6 - [c153]Umar Shoaib, Nadeem Ahmad, Paolo Prinetto, Gabriele Tiotto:
A platform-independent user-friendly dictionary from Italian to LIS. LREC 2012: 2435-2438 - 2011
- [j48]Rafal Baranowski, Stefano Di Carlo, Nadereh Hatami, Michael E. Imhof, Michael A. Kochte, Paolo Prinetto, Hans-Joachim Wunderlich, Christian G. Zoellin:
Efficient multi-level fault simulation of HW/SW systems for structural faults. Sci. China Inf. Sci. 54(9): 1784-1796 (2011) - [j47]Stefano Di Carlo, Paolo Prinetto, Alessandro Savino:
Software-Based Self-Test of Set-Associative Cache Memories. IEEE Trans. Computers 60(7): 1030-1044 (2011) - [c152]Davide Barberis, Nicola Garazzino, Paolo Prinetto, Gabriele Tiotto:
Improving accessibility for deaf people: an editor for computer assisted translation through virtual avatars. ASSETS 2011: 253-254 - [c151]Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Paolo Prinetto:
MarciaTesta: An Automatic Generator of Test Programs for Microprocessors' Data Caches. Asian Test Symposium 2011: 401-406 - [c150]Stefano Di Carlo, Gianfranco Politano, Paolo Prinetto, Alessandro Savino, Alberto Scionti:
Genetic Defect Based March Test Generation for SRAM. EvoApplications (2) 2011: 141-150 - [c149]Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Paolo Prinetto:
A unifying formalism to support automated synthesis of SBSTs for embedded caches. EWDTS 2011: 39-42 - [c148]Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Paolo Prinetto:
Validation & Verification of an EDA automated synthesis tool. IDT 2011: 48-52 - [c147]Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Gabriele Tiotto, Paolo Prinetto:
An area-efficient 2-D convolution implementation on FPGA for space applications. IDT 2011: 88-92 - 2010
- [c146]Michael A. Kochte, Christian G. Zoellin, Rafal Baranowski, Michael E. Imhof, Hans-Joachim Wunderlich, Nadereh Hatami, Stefano Di Carlo, Paolo Prinetto:
Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level. Asian Test Symposium 2010: 3-8 - [c145]Stefano Di Carlo, Andrea Miele, Paolo Prinetto, Antonio Trapanese:
Microprocessor fault-tolerance via on-the-fly partial reconfiguration. ETS 2010: 201-206 - [c144]Stefano Di Carlo, Michele Fabiano, Roberto Piazza, Paolo Prinetto:
Exploring modeling and testing of NAND flash memories. EWDTS 2010: 47-50 - [c143]Stefano Di Carlo, Michele Fabiano, Roberto Piazza, Paolo Prinetto:
EDACs and test integration strategies for NAND flash memories. EWDTS 2010: 218-221 - [c142]Nadereh Hatami, Marco Indaco, Paolo Prinetto, Gabriele Tiotto:
Communication interface synthesis from TLM 2.0 to RTL. EWDTS 2010: 222-226 - [c141]Nadereh Hatami, Paolo Prinetto, Gabriele Tiotto:
Sign Language synthesis using hand motion acquisition. EWDTS 2010: 226-229 - [c140]Homa Alemzadeh, Marco Cimei, Paolo Prinetto, Zainalabedin Navabi:
Facilitating testability of TLM FIFO: SystemC implementations. EWDTS 2010: 428-431 - [c139]Maurizio Caramia, Michele Fabiano, Andrea Miele, Roberto Piazza, Paolo Prinetto:
Automated synthesis of EDACs for FLASH memories with user-selectable correction capability. HLDVT 2010: 113-120 - [c138]Davide Barberis, Nicola Garazzino, Elio Piccolo, Paolo Prinetto, Gabriele Tiotto:
A Web Based Platform for Sign Language Corpus Creation. ICCHP (2) 2010: 193-199 - [c137]Michael A. Kochte, Christian G. Zoellin, Rafal Baranowski, Michael E. Imhof, Hans-Joachim Wunderlich, Nadereh Hatami, Stefano Di Carlo, Paolo Prinetto:
System reliability evaluation using concurrent multi-level simulation of structural faults. ITC 2010: 817
2000 – 2009
- 2009
- [j46]Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Paolo Prinetto:
Are IEEE-1500-Compliant Cores Really Compliant to the Standard?. IEEE Des. Test Comput. 26(3): 16-24 (2009) - [c136]Stefano Di Carlo, Paolo Prinetto, Alberto Scionti:
A FPGA-Based Reconfigurable Software Architecture for Highly Dependable Systems. Asian Test Symposium 2009: 125-130 - [c135]Michael A. Kochte, Christian G. Zoellin, Michael E. Imhof, Rauf Salimi Khaligh, Martin Radetzki, Hans-Joachim Wunderlich, Stefano Di Carlo, Paolo Prinetto:
Test exploration and validation using transaction level models. DATE 2009: 1250-1253 - [c134]Stefano Di Carlo, Nadereh Hatami, Paolo Prinetto, Alessandro Savino:
System Level Testing via TLM 2.0 Debug Transport Interface. DFT 2009: 286-294 - [c133]Maurizio Caramia, Stefano Di Carlo, Michele Fabiano, Paolo Prinetto:
FLARE: A design environment for FLASH-based space applications. HLDVT 2009: 14-19 - [c132]Stefano Di Carlo, Nadereh Hatami, Paolo Prinetto:
Test infrastructures evaluation at transaction level. ITC 2009: 1 - [c131]Paolo Prinetto, Gabriele Tiotto, Andrea Del Principe:
Designing health care applications for the deaf. PervasiveHealth 2009: 1-2 - 2008
- [j45]Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
March Test Generation Revealed. IEEE Trans. Computers 57(12): 1704-1713 (2008) - [j44]Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Yervant Zorian:
IEEE Standard 1500 Compliance Verification for Embedded Cores. IEEE Trans. Very Large Scale Integr. Syst. 16(4): 397-407 (2008) - [c130]Stefano Di Carlo, Alessandro Savino, Alberto Scionti, Paolo Prinetto:
Influence of Parasitic Capacitance Variations on 65 nm and 32 nm Predictive Technology Model SRAM Core-Cells. ATS 2008: 411-416 - [c129]Andrea Falletto, Paolo Prinetto, Gabriele Tiotto:
An Avatar-Based Italian Sign Language Visualization System. eHealth 2008: 154-160 - [c128]Simone Alpe, Stefano Di Carlo, Paolo Prinetto, Alessandro Savino:
Applying March Tests to K-Way Set-Associative Cache Memories. ETS 2008: 77-83 - [c127]Fatemeh Refan, Paolo Prinetto, Zainalabedin Navabi:
An IEEE 1500 compatible wrapper architecture for testing cores at transaction level. EWDTS 2008: 178-181 - [c126]Homa Alemzadeh, Zainalabedin Navabi, Stefano Di Carlo, Alberto Scionti, Paolo Prinetto:
Functional testing approaches for "BIFST-able" tlm_fifo. HLDVT 2008: 85-92 - [c125]Stefano Di Carlo, Paolo Prinetto, Alberto Scionti, Zaid Al-Ars:
Automating defects simulation and fault modeling for SRAMs. HLDVT 2008: 169-176 - [c124]Fatemeh Refan, Homa Alemzadeh, Saeed Safari, Paolo Prinetto, Zainalabedin Navabi:
Reliability in Application Specific Mesh-Based NoC Architectures. IOLTS 2008: 207-212 - [c123]Homa Alemzadeh, Stefano Di Carlo, Fatemeh Refan, Paolo Prinetto, Zainalabedin Navabi:
"Plug & Test" at System Level via Testable TLM Primitives. ITC 2008: 1-10 - 2007
- [j43]Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
March AB, a state-of-the-art march test for realistic static linked faults and dynamic faults in SRAMs. IET Comput. Digit. Tech. 1(3): 237-245 (2007) - [c122]Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Alberto Bosio:
Automating the IEEE std.1500 compliance verification for embedded cores. HLDVT 2007: 171-178 - [c121]Mohammad Hosseinabady, Mohammad Hossein Neishaburi, Zainalabedin Navabi, Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Giorgio Di Natale:
Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC. IOLTS 2007: 205-206 - 2006
- [j42]Mark D. Hill, Jean-Luc Gaudiot, Mary W. Hall, Joe Marks, Paolo Prinetto, Donna Baglio:
A Wiki for discussing and promoting best practices in research. Commun. ACM 49(9): 63-64 (2006) - [c120]Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
Memory Fault Simulator for Static-Linked Faults. ATS 2006: 31-36 - [c119]Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
ATPG for Dynamic Burn-In Test in Full-Scan Circuits. ATS 2006: 75-82 - [c118]Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
Automatic march tests generations for static linked faults in SRAMs. DATE 2006: 1258-1263 - [c117]Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs. DDECS 2006: 157-158 - [c116]Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
Automatic March Tests Generation for Multi-Port SRAMs. DELTA 2006: 385-392 - [c115]Mohammad Hosseinabady, Pejman Lotfi-Kamran, Giorgio Di Natale, Stefano Di Carlo, Alfredo Benso, Paolo Prinetto:
Single-Event Upset Analysis and Protection in High Speed Circuits. ETS 2006: 29-34 - [c114]Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
A 22n March Test for Realistic Static Linked Faults in SRAMs. ETS 2006: 49-54 - 2005
- [j41]Liviu Miclea, Szilárd Enyedi, Paolo Prinetto, Alfredo Benso:
Agent-based test and repair of distributed systems. J. Embed. Comput. 1(3): 405-414 (2005) - [j40]Andrea Baldini, Alfredo Benso, Paolo Prinetto:
System-level functional testing from UML specifications in end-of-production industrial environments. Int. J. Softw. Tools Technol. Transf. 7(4): 326-340 (2005) - [c113]Bruno Fabini, Paolo Maresca, Paolo Prinetto, C. Sanghez, Giorgio Santiano:
A GQM Based E-Learning Platform Evaluation. DMS 2005: 77-82 - [c112]Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
Automatic March tests generation for static and dynamic faults in SRAMs. ETS 2005: 122-127 - [c111]Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
March AB, March AB1: new March tests for unlinked dynamic memory faults. ITC 2005: 8 - [c110]Alfredo Benso, Alessandro Cilardo, Nicola Mazzocca, Liviu Miclea, Paolo Prinetto, Szilárd Enyedi:
Reconfigurable systems self-healing using mobile hardware agents. ITC 2005: 9 - 2004
- [j39]Paolo Prinetto, Alfredo Benso:
Test Technology TC Newsletter. IEEE Des. Test Comput. 21(2): 164-165 (2004) - [j38]Paolo Prinetto:
Test Technology Technical Council Newsletter. J. Electron. Test. 20(2): 131-132 (2004) - [j37]Paolo Prinetto:
Test Technology Technical Council Newsletter. J. Electron. Test. 20(3): 221-225 (2004) - [j36]Paolo Prinetto:
Test Technology Technical Council Newsletter. J. Electron. Test. 20(4): 329 (2004) - [j35]Paolo Prinetto:
Test Technology Technical Council Newsletter. J. Electron. Test. 20(5): 461-462 (2004) - [c109]Marie-Lise Flottes, Yves Bertrand, Luz Balado, Emili Lupon, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, Nicoleta Pricopi, Hans-Joachim Wunderlich:
Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competence in Europ. DELTA 2004: 135-139 - [c108]Liviu Miclea, Szilárd Enyedi, Gavril Toderean, Alfredo Benso, Paolo Prinetto:
Towards Microagent based DBIST/DBISR. ITC 2004: 867-874 - [c107]Andrea Baldini, Alfredo Benso, Paolo Prinetto:
A Dependable Autonomic Computing Environment for Self-Testing of Complex Heterogeneous Systems. TACoS 2004: 47-57 - 2003
- [j34]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni:
Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures. IEEE Commun. Mag. 41(9): 90-97 (2003) - [j33]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
Online Self-Repair of FIR Filters. IEEE Des. Test Comput. 20(3): 50-57 (2003) - [j32]Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Yervant Zorian:
A Hierarchical Infrastructure for SoC Test Management. IEEE Des. Test Comput. 20(4): 32-39 (2003) - [c106]Fabrizio Bertuccelli, Franco Bigongiari, Andrea S. Brogna, Giorgio Di Natale, Paolo Prinetto, Roberto Saletti:
Exhaustive Test of Several Dependable Memory Architectures Designed by GRAAL Tool. Asian Test Symposium 2003: 32-37 - [c105]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
A Watchdog Processor to Detect Data and Control Flow Errors. IOLTS 2003: 144-148 - [c104]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, I. Solcia, Luca Tagliaferri:
FAUST: FAUlt-injection Script-based Tool. IOLTS 2003: 160 - [c103]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri:
Data Critically Estimation In Software Applications. ITC 2003: 802-810 - [c102]Liviu Miclea, Szilárd Enyedi, Gavril Toderean, Alfredo Benso, Paolo Prinetto:
Agent Based DBIST/DBISR And Its Web/Wireless Management. ITC 2003: 952-960 - [c101]Yves Bertrand, Marie-Lise Flottes, Luz Balado, Joan Figueras, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, Nicoleta Pricopi, Hans-Joachim Wunderlich, Jean-Pierre Van der Heyden:
Test Engineering Education in Europe: the EuNICE-Test Project. MSE 2003: 85-86 - [c100]Andrea S. Brogna, Franco Bigongiari, Silvia Chiusano, Paolo Prinetto, Roberto Saletti:
Designing and Testing High Dependable Memories for Aerospace Applications. VLSI-SOC 2003: 221- - [c99]Andrea Baldini, Paolo Prinetto, Giovanni Denaro, Mauro Pezzè:
Design for Testability for Highly Reconfigurable Component-Based Systems. TACoS 2003: 199-208 - 2002
- [j31]Alfredo Benso, Silvia Chiusano, Paolo Prinetto:
DFT and BIST of a Multichip Module for High-Energy Physics Experiments. IEEE Des. Test Comput. 19(3): 94-105 (2002) - [j30]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero:
Initializability analysis of synchronous sequential circuits. ACM Trans. Design Autom. Electr. Syst. 7(2): 249-264 (2002) - [j29]Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto:
An on-line BIST RAM architecture with self-repair capabilities. IEEE Trans. Reliab. 51(1): 123-128 (2002) - [c98]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
Specification and Design of a New Memory Fault Simulator. Asian Test Symposium 2002: 92-97 - [c97]Andrea Baldini, Alfredo Benso, Paolo Prinetto, Sergio Mo, Andrea Taddei:
Beyond UML to an End-of-Line Functional Test Engine. DATE 2002: 499-503 - [c96]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
An Optimal Algorithm for the Automatic Generation of March Tests. DATE 2002: 938-943 - [c95]Michel Renovell, Penelope Faure, Paolo Prinetto, Yervant Zorian:
Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA. DELTA 2002: 297-301 - [c94]Silvia Chiusano, Stefano Di Carlo, Paolo Prinetto:
Automated Synthesis of SEU Tolerant Architectures from OO Descriptions. IOLTW 2002: 26-31 - [c93]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
Static Analysis of SEU Effects on Software Applications. ITC 2002: 500-508 - [c92]Andrea Baldini, Alfredo Benso, Paolo Prinetto, Sergio Mo, Andrea Taddei:
Efficient Design of System Test: A Layered Architecture. ITC 2002: 930-939 - 2001
- [j28]Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni:
Online and Offline BIST in IP-Core Design. IEEE Des. Test Comput. 18(5): 92-99 (2001) - [j27]Paolo Prinetto, Joan Figueras:
Guest Editorial. J. Electron. Test. 17(3-4): 207 (2001) - [j26]Alfredo Benso, Silvia Chiusano, Paolo Prinetto:
A Self-Repairing Execution Unit for Microprogrammed Processors. IEEE Micro 21(5): 16-22 (2001) - [c91]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
Memory Read Faults: Taxonomy and Automatic Test Generation. Asian Test Symposium 2001: 157-163 - [c90]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri:
Control-Flow Checking via Regular Expressions. Asian Test Symposium 2001: 299-303 - [c89]Yervant Zorian, Paolo Prinetto, João Paulo Teixeira, Isabel C. Teixeira, Carlos Eduardo Pereira, Octávio Páscoa Dias, Jorge Semião, Peter Muhmenthaler, W. Radermacher:
Embedded tutorial: TRP: integrating embedded test and ATE. DATE 2001: 34-37 - [c88]Silvia Chiusano, Stefano Di Carlo, Paolo Prinetto, Hans-Joachim Wunderlich:
On applying the set covering model to reseeding. DATE 2001: 156-161 - [c87]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
SEU effect analysis in an open-source router via a distributed fault injection environment. DATE 2001: 219-225 - [c86]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Luca Tagliaferri, Paolo Prinetto:
Validation of a Software Dependability Tool via Fault Injection Experiments. IOLTW 2001: 3-8 - [c85]Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Franco Bigongiari:
GRAAL: a tool for highly dependable SRAMs generation. ITC 2001: 250-257 - [c84]Andrea Baldini, Alfredo Benso, Paolo Prinetto, Sergio Mo, Andrea Taddei:
Towards a unified test process: from UML to end-of-line functional test. ITC 2001: 600-608 - 2000
- [j25]Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian:
A High-Level EDA Environment for the Automatic Insertion of HD-BIST Structures. J. Electron. Test. 16(3): 179-184 (2000) - [c83]Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Hans-Joachim Wunderlich:
Optimal Hardware Pattern Generation for Functional BIST. DATE 2000: 292-297 - [c82]Alfredo Benso, Silvia Chiusano, Paolo Prinetto, P. Simonotti, G. Ugo:
Self-Repairing in a Micro-Programmed Processor for Dependable Applications. DFT 2000: 231-239 - [c81]Andrea Baldini, Alfredo Benso, Silvia Chiusano, Paolo Prinetto:
'BOND': An Interposition Agents Based Fault Injector for Windows NT. DFT 2000: 387-395 - [c80]Alfredo Benso, Silvia Chiusano, Paolo Prinetto, Luca Tagliaferri:
A C/C++ Source-to-Source Compiler for Dependable Applications. DSN 2000: 71-78 - [c79]Monica Lobetti Bodoni, Alfredo Benso, Silvia Chiusano, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto:
An effective distributed BIST architecture for RAMs. ETW 2000: 119-124 - [c78]Alfredo Benso, Stefano Martinetto, Paolo Prinetto, Riccardo Mariani:
An SEU Injection Tool to Evaluate DSP-Based Architectures for Space Applications. ICCD 2000: 537-538 - [c77]Alfredo Benso, Stefano Di Carlo, Silvia Chiusano, Paolo Prinetto, Fabio Ricciato, Monica Lobetti Bodoni, Maurizio Spadari:
On Integrating a Proprietary and a Commercial Architecture for Optimal BIST Performances in SoCs. ICCD 2000: 539-540 - [c76]Alfredo Benso, Silvia Chiusano, Paolo Prinetto:
A COTS Wrapping Toolkit for Fault Tolerant Applications under Windows NT. IOLTW 2000: 9-16 - [c75]Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni:
A Family of Self-Repair SRAM Cores. IOLTW 2000: 214-218 - [c74]Alfredo Benso, Silvia Chiusano, Paolo Prinetto:
A software development kit for dependable applications in embedded systems. ITC 2000: 170-178 - [c73]Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni:
A programmable BIST architecture for clusters of multiple-port SRAMs. ITC 2000: 557-566 - [c72]Silvia Chiusano, Paolo Prinetto, Hans-Joachim Wunderlich:
Non-intrusive BIST for systems-on-a-chip. ITC 2000: 644-651 - [c71]Alfredo Benso, Silvia Chiusano, Stefano Di Carlo, Paolo Prinetto, Fabio Ricciato, Maurizio Spadari, Yervant Zorian:
HD2BIST: a hierarchical framework for BIST scheduling, data patterns delivering and diagnosis in SoCs. ITC 2000: 892-901
1990 – 1999
- 1999
- [j24]Stefano Barbagallo, Monica Lobetti Bodoni, Alfredo Benso, Silvia Chiusano, Paolo Prinetto:
Testing embedded memories in telecommunication systems. IEEE Commun. Mag. 37(6): 84-89 (1999) - [j23]Silvia Chiusano, Fulvio Corno, Paolo Prinetto:
Exploiting Behavioral Information in Gate-Level ATPG. J. Electron. Test. 14(1-2): 141-148 (1999) - [j22]Fulvio Corno, Uwe Gläser, Paolo Prinetto, Matteo Sonza Reorda, Heinrich Theodor Vierhaus, Massimo Violante:
SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(2): 191-202 (1999) - [c70]Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian:
A high-level EDA environment for the automatic insertion of HD-BIST structures. ETW 1999: 2-6 - [c69]Alfredo Benso, Silvia Chiusano, Paolo Prinetto, Simone Giovannetti, Riccardo Mariani, Silvano Motto:
Testing an MCM for high-energy physics experiments: a case study. ITC 1999: 38-46 - [c68]Monica Lobetti Bodoni, Alessio Pricco, Alfredo Benso, Silvia Chiusano, Paolo Prinetto:
An on-line BISTed SRAM IP core. ITC 1999: 993-1000 - [c67]Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian:
HD-BIST: a hierarchical framework for BIST scheduling and diagnosis in SOCs. ITC 1999: 1038-1044 - [c66]Silvia Chiusano, Fulvio Corno, Paolo Prinetto:
RT-level TPG Exploiting High-Level Synthesis Information. VTS 1999: 341-353 - 1998
- [j21]Stefano Barbagallo, Davide Medina, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Integrating Online and Offline Testing of a Switching Memory. IEEE Des. Test Comput. 15(1): 63-70 (1998) - [j20]Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
The General Product Machine: a New Model for Symbolic FSM Traversal. Formal Methods Syst. Des. 12(3): 267-289 (1998) - [j19]Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
EXFI: a low-cost fault injection system for embedded microprocessor-based boards. ACM Trans. Design Autom. Electr. Syst. 3(4): 626-634 (1998) - [c65]Silvia Chiusano, Fulvio Corno, Paolo Prinetto:
A Test Pattern Generation Algorithm Exploiting Behavioral Information. Asian Test Symposium 1998: 480-485 - [c64]Elizabeth M. Rudnick, Roberto Vietti, Akilah Ellis, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques. DATE 1998: 570-576 - [c63]Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante:
Exploiting Symbolic Techniques for Partial Scan Flip Flop Selection. DATE 1998: 670-677 - [c62]Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
A fault injection environment for microprocessor-based boards. ITC 1998: 768-773 - [c61]Fulvio Corno, Nicola Gaudenzi, Paolo Prinetto, Matteo Sonza Reorda:
On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits. VTS 1998: 424-429 - [c60]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
A Test Pattern Generation Methodology for Low-Power Consumption. VTS 1998: 453-459 - 1997
- [c59]Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
Guaranteeing Testability in Re-encoding for Low Power. Asian Test Symposium 1997: 30-35 - [c58]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero:
A Genetic Algorithm for the Computation of Initialization Sequences for Synchronous Sequential Circuits. Asian Test Symposium 1997: 56-61 - [c57]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Exploiting Logic Simulation to Improve Simulation-based Sequential ATPG. Asian Test Symposium 1997: 68-73 - [c56]Mario Baldi, Fulvio Corno, Maurizio Rebaudengo, Paolo Prinetto, Matteo Sonza Reorda, Giovanni Squillero:
Simulation-based verification of network protocols performance. CHARME 1997: 236-251 - [c55]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
New static compaction techniques of test sequences for sequential circuits. ED&TC 1997: 37-43 - [c54]Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Hybrid symbolic-explicit techniques for the graph coloring problem. ED&TC 1997: 422-426 - [c53]Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Raimund Ubar:
A new approach to build a low-level malicious fault list starting from high-level description and alternative graphs. ED&TC 1997: 560-565 - [c52]Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Jaan Raik, Raimund Ubar:
Exploiting High-Level Descriptions for Circuits Fault Tolerance Assessments. DFT 1997: 212-217 - [c51]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero:
A new Approach for Initialization Sequences Computation for Synchronous Sequential Circuits. ICCD 1997: 381-386 - [c50]S. Chuisano, Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
Exploiting Symbolic Techniques within Genetic Algorithms for Power Optimization. ICTAI 1997: 133- - [c49]Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Testability Analysis and ATPG on Behavioral RT-Level VHDL. ITC 1997: 753-759 - [c48]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
SAARA: a simulated annealing algorithm for test pattern generation for digital circuits. SAC 1997: 228-232 - [c47]Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Cellular automata for deterministic sequential test pattern generation. VTS 1997: 60-67 - [c46]J. Abraham, Phyllis G. Frankl, Christian Landrault, Meryem Marzouki, Paolo Prinetto, Chantal Robach, Pascale Thévenod-Fosse:
Hardware Test: Can We Learn from Software Testing? VTS 1997: 320-321 - 1996
- [j18]Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Circular Self-Test Path for FSMs. IEEE Des. Test Comput. 13(4): 50-60 (1996) - [j17]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
GATTO: a genetic algorithm for automatic test pattern generation for large synchronous sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(8): 991-1000 (1996) - [c45]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, R. Mosca:
Advanced Techniques for GA-based sequential ATPGs. ED&TC 1996: 375-379 - [c44]Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Self-Checking and Fault Tolerant Approaches Can Help BIST Fault Coverage: A Case Study. ED&TC 1996: 610 - [c43]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Maurizio Damiani, Leonardo Impagliazzo, G. Sartore:
On-line Testing of an Off-the-shelf Microprocessor Board for Safety-critical Applications. EDCC 1996: 190-202 - [c42]Paolo Prinetto, Fulvio Corno, Matteo Sonza Reorda:
Fault tolerant and BIST design of a FIFO cell. EURO-DAC 1996: 233-238 - [c41]Paolo Prinetto, Alfredo Benso, Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Arturo M. Amendola, Leonardo Impagliazzo, P. Marmo:
Fault behavior observation of a microprocessor system through a VHDL simulation-based fault injection experiment. EURO-DAC 1996: 536-541 - [c40]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
A Parallel Genetic Algorithm for Automatic Generation of Test Sequences for Digital Circuits. HPCN Europe 1996: 454-459 - [c39]Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
A Genetic Algorithm for Automatic Generation of Test Logic for Digital Circuits. ICTAI 1996: 10-16 - [c38]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
Comparing Topological, Symbolic and GA-based ATPGs: An Experimental Approach. ITC 1996: 39-47 - [c37]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
Partial Scan Flip Flop Selection for Simulation-Based Sequential ATPGs. ITC 1996: 558-564 - [c36]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
Exploiting Competing Subpopulations for Automatic Generation of Test Sequences for Digital Cicuits. PPSN 1996: 792-800 - [c35]Stefano Barbagallo, Monica Lobetti Bodoni, Davide Medina, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Scan insertion criteria for low design impact. VTS 1996: 26-31 - 1995
- [j16]Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda, Stefano Barbagallo, Andrea Burri, Davide Medina:
Industrial BIST of Embedded RAMs. IEEE Des. Test Comput. 12(3): 86-95 (1995) - [c34]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
GARDA: a diagnostic ATPG for large synchronous sequential circuits. ED&TC 1995: 267-273 - [c33]Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Using symbolic techniques to find the maximum clique in very large sparse graphs. ED&TC 1995: 320-324 - [c32]Fulvio Corno, Marco Cusinato, Mario Ferrero, Paolo Prinetto:
Proving testing preorders for process algebra descriptions. ED&TC 1995: 333-339 - [c31]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Enzo Veiluva:
A PVM tool for automatic test generation on parallel and distributed systems. HPCN Europe 1995: 39-44 - [c30]Stefano Barbagallo, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Testing a Switching Memory in a Telcommunication System. ITC 1995: 947-956 - [c29]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Enzo Veiluva:
A portable ATPG tool for parallel and distributed systems. VTS 1995: 29-34 - [c28]Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Uwe Gläser, Heinrich Theodor Vierhaus:
Improving topological ATPG with symbolic techniques. VTS 1995: 338-343 - 1994
- [c27]Paolo Prinetto, Fulvio Corno, Matteo Sonza Reorda:
An experimental analysis of the effectiveness of the circular self-test path technique. EURO-DAC 1994: 246-251 - [c26]Catherine Bayol, Bernard Soulas, Dominique Borrione, Fulvio Corno, Paolo Prinetto:
A process algebra interpretation of a verification oriented overlanguage of VHDL. EURO-DAC 1994: 506-511 - [c25]Paolo Camurati, Fulvio Corno, Paolo Prinetto, Catherine Bayol, Bernard Soulas:
System-Level Modeling and Verification: a Comprehensive Design Methodology. EDAC-ETC-EUROASIC 1994: 636-640 - [c24]Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Enzo Veiluva:
GATTO: An Intelligent Tool for Automatic Test Pattern Generation for Digital Circuits. ICTAI 1994: 411-417 - [c23]Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
An Automatic Test Pattern Generator for Large Sequential Circuits Based on Genetic Algorithms. ITC 1994: 240-249 - [c22]Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Making the Circular Self-Test Path Technique Effective for Real Circuits. ITC 1994: 949-957 - [c21]Paolo Camurati, Fulvio Corno, Michela Meo, Paolo Prinetto:
A new functional fault model for system-level descriptions. VTS 1994: 214-219 - [c20]Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda, Stefano Barbagallo, Andrea Burri, Davide Medina:
An industrial experience in the built-in self test of embedded RAMs. VTS 1994: 306-311 - 1993
- [j15]Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
An approach to sequential circuit diagnosis based on formal verification techniques. J. Electron. Test. 4(1): 11-17 (1993) - [c19]Paolo Camurati, Fulvio Corno, Paolo Prinetto:
A Methodology for System-Level Design for Verifiability. CHARME 1993: 80-91 - [c18]Paolo Camurati, Fulvio Corno, Paolo Prinetto:
Exploiting Symbolic Traversal Techniques for Efficient Process Algebra Manipulation. CHDL 1993: 31-44 - [c17]Paolo Camurati, Fulvio Corno, Paolo Prinetto:
An efficient tool for system-level verification of behaviors and temporal properties. EURO-DAC 1993: 124-129 - 1992
- [c16]Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Silvano Gai, Paolo Prinetto, Matteo Sonza Reorda:
A New Model for Improving symbolic Product Machine Traversal. DAC 1992: 614-619 - [c15]Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Cross-fertilizing FSM verification techniques and sequential diagnosis. EURO-DAC 1992: 306-311 - [c14]Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Sequential Circuit Diagnosis Based on Formal Verification Techniques. ITC 1992: 187-196 - 1991
- [j14]Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda:
TPDL: Extended Temporal Profile Description Language. Softw. Pract. Exp. 21(4): 355-374 (1991) - [c13]Paolo Camurati, Tiziana Margaria, Paolo Prinetto:
Resolution-based correctness proofs of synchronous circuits. EURO-DAC 1991: 11-15 - [c12]Paolo Camurati, Marco Gilli, Paolo Prinetto, Matteo Sonza Reorda:
Proving finite state machines correct with an automaton-based method. Great Lakes Symposium on VLSI 1991: 255-258 - 1990
- [j13]Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda:
Exact probabilistic testability measures for multi-output circuits. J. Electron. Test. 1(3): 229-234 (1990) - [j12]Paolo Camurati, Antonio Lioy, Paolo Prinetto, Matteo Sonza Reorda:
Assessing the diagnostic power of test pattern sets. Microprocessing and Microprogramming 30(1-5): 413-419 (1990) - [j11]Paolo Camurati, Tiziana Margaria, Paolo Prinetto:
The OTTER environment for resolution-based proof of hardware correctness. Microprocessing and Microprogramming 30(1-5): 421-428 (1990) - [c11]Paolo Camurati, Marco Gilli, Paolo Prinetto, Matteo Sonza Reorda:
The Use of Model Checking in ATPG for Sequential Circuits. CAV 1990: 86-95 - [c10]Paolo Camurati, Marco Gilli, Paolo Prinetto, Matteo Sonza Reorda:
Model Checking and Graph Theory in Sequential ATPG. CAV (DIMACS/AMS volume) 1990: 505-518 - [c9]Paolo Camurati, Antonio Lioy, Paolo Prinetto, Matteo Sonza Reorda:
Diagnosis oriented test pattern generation. EURO-DAC 1990: 470-474 - [c8]Paolo Camurati, Davide Medina, Paolo Prinetto, Matteo Sonza Reorda:
A diagnostic test pattern generation algorithm. ITC 1990: 52-58
1980 – 1989
- 1989
- [j10]Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda:
Expressing logical and temporal conditions in simulation environments: TPDL*. Microprocessing and Microprogramming 26(4): 241-252 (1989) - [j9]Paolo Camurati, Tiziana Margaria, Paolo Prinetto:
Systolic array description in F2. Microprocessing and Microprogramming 27(1-5): 171-178 (1989) - [j8]Paolo Camurati, Marco Mezzalama, Paolo Prinetto:
Knowledge-based systems as an aid to computer-aided repair. Microprocess. Microsystems 13(7): 457-461 (1989) - [c7]Dominique Borrione, Paolo Prinetto:
Zero-Defect Designs, Why and How: Formal Verification vs. Automated Synthesis. IFIP Congress 1989: 233-240 - 1988
- [j7]Paolo Camurati, Paolo Prinetto:
Formal Verification of Hardware Correctness: Introduction and Survey of Current Research. Computer 21(7): 8-19 (1988) - [j6]Paolo Camurati, Paolo Gianoglio, Renato Gianoglio, Paolo Prinetto:
ESTA: an expert system for DFT rule verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(11): 1172-1180 (1988) - [c6]Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda:
Random testability analysis: comparing and evaluating existing approaches. ICCD 1988: 70-73 - [c5]Dominique Borrione, Paolo Camurati, J. L. Paillet, Paolo Prinetto:
A functional approach to formal hardware verification: the MTI experience. ICCD 1988: 592-595 - 1986
- [c4]Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto:
Experiences in Prolog-Based DFT Rule Checking. FJCC 1986: 909-914 - 1985
- [j5]Fabio Somenzi, Silvano Gai, Marco Mezzalama, Paolo Prinetto:
Testing Strategy and Technique for Macro-Based Circuits. IEEE Trans. Computers 34(1): 85-90 (1985) - 1984
- [j4]Fabio Somenzi, Silvano Gai, Marco Mezzalama, Paolo Prinetto:
PART: Programmable Array Testing Based on a Partitioning Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 3(2): 142-149 (1984) - 1983
- [j3]Silvano Gai, Marco Mezzalama, Paolo Prinetto:
A review of fault models for lsi/vlsi devices. Softw. Microsystems 2(2): 53- (1983) - [j2]Marco Mezzalama, Paolo Prinetto:
A Hierarchical Description Model for Microcode. IEEE Trans. Computers 32(5): 478-487 (1983) - [c3]Fabio Somenzi, Silvano Gai, Marco Mezzalama, Paolo Prinetto:
A new integrated system for PLA testing and verification. DAC 1983: 57-63 - 1982
- [j1]Marco Mezzalama, Paolo Prinetto:
A Machine-independent Approach to Microprogram Synthesis. Softw. Pract. Exp. 12(10): 985-1010 (1982) - [c2]Marco Mezzalama, Paolo Prinetto, G. Filippi:
Microcode compaction via microblock definition. MICRO 1982: 134-142
1970 – 1979
- 1979
- [c1]Marco Mezzalama, Paolo Prinetto:
Design and implementation of a flexible and interactive microprogram simulator. MICRO 1979: 42-48
Coauthor Index
[j46] [j45] [j44] [c122] [c121] [c120] [c119] [c118] [c117] [c116] [c115] [c114] [j41] [j40] [c112] [c111] [c110] [j39] [c108] [c107] [j34] [j33] [j32] [c105] [c104] [c103] [c102] [j31] [j29] [c98] [c97] [c96] [c93] [c92] [j28] [j26] [c91] [c90] [c87] [c86] [c84] [j25] [c82] [c81] [c80] [c79] [c78] [c77] [c76] [c75] [c74] [c73] [c71] [j24] [c70] [c69] [c68] [c67] [j19] [c62] [c53] [c52] [c41]
[c195] [c191] [j57] [j56] [j55] [j54] [c179] [c178] [j53] [j51] [c175] [c174] [c173] [c172] [c169] [c168] [j49] [c166] [c164] [c163] [c162] [c161] [c160] [c159] [c158] [c157] [c155] [j48] [j47] [c151] [c150] [c149] [c148] [c147] [c146] [c145] [c144] [c143] [c137] [j46] [c136] [c135] [c134] [c133] [c132] [j45] [j44] [c130] [c128] [c126] [c125] [c123] [j43] [c122] [c121] [c120] [c119] [c118] [c117] [c116] [c115] [c114] [c112] [c111] [c109] [j34] [j33] [j32] [c105] [c104] [c103] [c101] [c98] [c96] [c94] [c93] [c91] [c90] [c88] [c87] [c86] [c79] [c77] [c73] [c71]
[j30] [j23] [j22] [c66] [j21] [j20] [c65] [c64] [c63] [c61] [c60] [c59] [c58] [c57] [c56] [c55] [c54] [c51] [c50] [c49] [c48] [c47] [j18] [j17] [c45] [c44] [c43] [c42] [c41] [c40] [c39] [c38] [c37] [c36] [c35] [c34] [c33] [c32] [c31] [c30] [c29] [c28] [c27] [c26] [c25] [c22] [c21] [j15] [c19] [c18] [c17] [c16] [c15] [c14]
Zainalabedin Navabi
aka: Zain Navabi
aka: Zain Navabi
[j30] [j22] [j21] [j20] [j19] [c64] [c63] [c62] [c61] [c60] [c59] [c58] [c57] [c56] [c55] [c54] [c53] [c52] [c51] [c50] [c49] [c48] [c47] [j18] [j17] [c45] [c44] [c43] [c42] [c41] [c40] [c39] [c38] [c37] [c36] [c35] [j16] [c34] [c33] [c31] [c30] [c29] [c28] [c27] [c24] [c23] [c22] [c20] [j15] [c16] [c15] [c14] [j14] [c12] [j13] [j12] [c11] [c10] [c9] [c8] [j10] [c6]
Elena I. Vatajelu
aka: Elena Ioana Vatajelu
aka: Elena Ioana Vatajelu
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