default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDYoshio Matsuda
Person information
SPARQL queries 
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2022
[j26]Narumi Sugiura, Rikako Ogura, Yoshio Matsuda, Takashi Komuro, Kayo Ogawa:
Users' Content Memorization in Multi-User Interactive Public Displays. Int. J. Hum. Comput. Interact. 38(5): 447-455 (2022)- 2020
- [c24]Yoshio Matsuda, Takashi Komuro, Takuya Yoda, Hajime Nagahara, Shoji Kawahito, Keiichiro Kagawa:
Palm-Controlled Pointing Interface Using a Dynamic Photometric Stereo Camera. HCI (48) 2020: 142-147 - [c23]Yoshio Matsuda, Takashi Komuro:
Dynamic layout optimization for multi-user interaction with a large display. IUI 2020: 401-409
2010 – 2019
- 2019
- [j25]Masanori Hayashikoshi, Hiroaki Tanizaki, Yasumitsu Murai, Takaharu Tsuji, Kiyoshi Kawabata, Koji Nii, Hideyuki Noda, Hiroyuki Kondo, Yoshio Matsuda, Hideto Hidaka:
A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications. IEICE Trans. Electron. 102-C(4): 287-295 (2019) - [c22]Kousuke Imamura, Satoshi Kanda, Saya Ohira, Yoshio Matsuda, Tetsuya Matsumura:
Scalable Architecture for High-Resolution Real-time Optical Flow Processor. IoTaIS 2019: 248-253 - [c21]Kosuke Fukava, Kaito Mori, Kousuke Imamura, Yoshio Matsuda, Tetsuya Matsumura, Seiji Mochizuki:
Design and Implementation of Ultra-Low-Latency Video Encoder Using High-Level Synthesis. ISPACS 2019: 1-2 - [c20]Yuriko Sakakibara, Yoshio Matsuda, Takashi Komuro, Kayo Ogawa:
Simultaneous interaction with a large display by many users. PerDis 2019: 34:1-34:2 - 2018
- [j24]Reo Aoki, Kousuke Imamura, Akihiro Hirano, Yoshio Matsuda:
High-Performance Super-Resolution via Patch-Based Deep Neural Network for Real-Time Implementation. IEICE Trans. Inf. Syst. 101-D(11): 2808-2817 (2018) - [j23]Masanori Hayashikoshi
, Hideyuki Noda, Hiroyuki Kawai, Yasumitsu Murai, Sugako Otani, Koji Nii, Yoshio Matsuda, Hiroyuki Kondo:
Low-Power Multi-Sensor System with Power Management and Nonvolatile Memory Access Control for IoT Applications. IEEE Trans. Multi Scale Comput. Syst. 4(4): 784-792 (2018) - [c19]Seiji Mochizuki, Kousuke Imamura, Kaito Mori, Yoshio Matsuda, Tetsuya Matsumura:
Ultra-low-latency Video Coding Method for Autonomous Vehicles and Virtual Reality Devices. IOTAIS 2018: 155-161 - [c18]Yoshio Matsuda, Takashi Komuro:
A Multi-user Interactive Public Display with Dynamic Layout Optimization. PerDis 2018: 27:1-27:2 - 2017
- [j22]Kousuke Imamura, Ryota Honda, Yoshifumi Kawamura, Naoki Miura, Masami Urano, Satoshi Shigematsu, Tetsuya Matsumura, Yoshio Matsuda:
A 100-MHz 51.2-Gb/s Packet Lookup Engine with Automatic Table Update Function. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(10): 2123-2134 (2017) - [j21]Yu Suzuki, Masato Ito, Satoshi Kanda, Kousuke Imamura, Yoshio Matsuda, Tetsuya Matsumura:
Design and Implementation of 176-MHz WXGA 30-fps Real-Time Optical Flow Processor. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(12): 2888-2900 (2017) - 2016
- [j20]Yoshifumi Kawamura, Naoya Okada, Yoshio Matsuda, Tetsuya Matsumura, Hiroshi Makino, Kazutami Arimoto:
A Field Programmable Sequencer and Memory with Middle Grained Programmability Optimized for MCU Peripherals. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(5): 917-928 (2016) - [c17]Ryota Bnadou, Masahiro Hiramori, Shuhei Iwade, Hiroshi Makino, Tutomu Yoshimura, Yoshio Matsuda:
A study on motion estimation algorithm for moving pictures. GCCE 2016: 1-3 - [c16]Masahiro Hiramori, Ryota Bandou, Shuhei Iwade, Hiroshi Makino, Tsutomu Yoshimura, Yoshio Matsuda:
A study on fast motion estimation algorithm. GCCE 2016: 1-3 - [c15]Kousuke Imamura, Naoki Kimura, Fumiaki Satou, Shigeru Sanada, Yoshio Matsuda:
Image denoising using non-local means for Poisson noise. ISPACS 2016: 1-6 - [c14]Tetsuya Matsumura, Kousuke Imamura, Yoshifumi Kawamura, Yoshio Matsuda:
Automatic rule registration and deletion function on a packet lookup engine LSI. ISPACS 2016: 1-6 - 2015
- [c13]Tetsuya Matsumura, Aoi Kurokawa, Kousuke Imamura, Yoshio Matsuda:
A Design for the 178-MHz WXGA 30-fps Optical Flow Processor Based on the HOE Algorithm. DDECS 2015: 31-36 - [c12]Kousuke Imamura, Kaoru Itoh, Yoshio Matsuda:
A fast atom selection method based on the order of initial inner product values for image denoising using sparse representation. ISPACS 2015: 188-193 - [c11]Yoshifumi Kawamura, Kousuke Imamura, Naoki Miura, Masami Urano, Satoshi Shigematsu, Yoshio Matsuda:
A 100-MHz 51.2-Gb/s packet lookup engine LSI based on missmatch detection circuit combined with linked-list hash table. ISPACS 2015: 351-356 - 2014
- [j19]Shunji Nakata, Hiroshi Makino, Ryota Honda, Masayuki Miyama, Yoshio Matsuda:
Analysis of voltage, Current and Energy dissipation of Stepwise Adiabatic Charging of a capacitor using a nonresonant inductor Current. J. Circuits Syst. Comput. 23(3) (2014) - [j18]Shunji Nakata, Hiroshi Makino, Junpei Hosokawa, Tsutomu Yoshimura, Shuhei Iwade, Yoshio Matsuda:
Energy Efficient Stepwise Charging of a Capacitor Using a DC-DC Converter With Consecutive Changes of its Duty Ratio. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(7): 2194-2203 (2014) - [j17]Shunji Nakata, Hiroki Hanazono, Hiroshi Makino, Hiroki Morimura, Masayuki Miyama, Yoshio Matsuda:
Increase in Read Noise Margin of Single-Bit-Line SRAM Using Adiabatic Change of Word Line Voltage. IEEE Trans. Very Large Scale Integr. Syst. 22(3): 686-690 (2014) - [c10]Tetsuya Matsumura, Naoya Okada, Yoshifumi Kawamura, Koji Nii, Kazutami Arimoto, Hiroshi Makino, Yoshio Matsuda:
The LSI implementation of a memory based field programmable device for MCU peripherals. DDECS 2014: 183-188 - [c9]Shunji Nakata, Hiroshi Makino, Yoshio Matsuda:
A new stepwise adiabatic charging circuit with a smaller capacitance in a regenerator than a load capacitance. MWSCAS 2014: 439-442 - 2013
- [j16]Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino, Yoshio Matsuda:
Analysis of Pull-in Range Limit by Charge Pump Mismatch in a Linear Phase-Locked Loop. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(4): 896-907 (2013) - [c8]Koji Nii, Makoto Yabuuchi, Hidehiro Fujiwara, Yasumasa Tsukamoto, Yuichiro Ishii, Tetsuya Matsumura, Yoshio Matsuda:
A cost-effective 45nm 6T-SRAM reducing 50mV Vmin and 53% standby leakage with multi-Vt asymmetric halo MOS and write assist circuitry. ISQED 2013: 438-441 - 2012
- [j15]Hiroshi Makino, Shunji Nakata, Hirotsugu Suzuki, Shin'ichiro Mutoh, Masayuki Miyama, Tsutomu Yoshimura, Shuhei Iwade, Yoshio Matsuda:
Utilising the normal distribution of the write noise margin to easily predict the SRAM write yield. IET Circuits Devices Syst. 6(4): 260-270 (2012) - [j14]Shunji Nakata, Ryota Honda, Hiroshi Makino, Shin'ichiro Mutoh, Masayuki Miyama, Yoshio Matsuda:
General Stability of Stepwise Waveform of an Adiabatic Charge Recycling Circuit With Any Circuit Topology. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(10): 2301-2314 (2012) - [c7]Shunji Nakata, Ryota Honda, Hiroshi Makino, Hiroki Morimura, Yoshio Matsuda:
Energy dissipation reduction during adiabatic charging and discharging with controlled inductor current. MWSCAS 2012: 1068-1071 - 2011
- [j13]Hiroshi Makino, Shunji Nakata, Hirotsugu Suzuki, Shin'ichiro Mutoh, Masayuki Miyama, Tsutomu Yoshimura, Shuhei Iwade, Yoshio Matsuda:
Reexamination of SRAM Cell Write Margin Definitions in View of Predicting the Distribution. IEEE Trans. Circuits Syst. II Express Briefs 58-II(4): 230-234 (2011) - [c6]Masayuki Miyama, Yoshio Matsuda:
Vehicle detection and tracking with affine motion segmentation in stereo video. ICSIPA 2011: 271-276 - 2010
- [j12]Shunji Nakata, Shin'ichiro Mutoh, Hiroshi Makino, Masayuki Miyama, Yoshio Matsuda:
Stable adiabatic circuit using advanced series capacitors and time variation of energy dissipation. IEICE Electron. Express 7(9): 640-646 (2010) - [j11]Katsumi Dosaka, Daisuke Ogawa, Takahito Kusumoto, Masayuki Miyama, Yoshio Matsuda:
A Complete Charge Recycling TCAM with Checkerboard Array Arrangement for Low Power Applications. IEICE Trans. Electron. 93-C(5): 685-695 (2010) - [j10]Yoshiki Yunbe, Masayuki Miyama, Yoshio Matsuda:
A VGA 30 fps Affine Motion Model Estimation VLSI for Real-Time Video Segmentation. IEICE Trans. Inf. Syst. 93-D(12): 3284-3293 (2010) - [j9]Shunji Nakata, Masayuki Miyama, Yoshio Matsuda:
Adiabatic charging and discharging method with minimum energy dissipation for a variable-gap capacitor system. IET Circuits Devices Syst. 4(4): 301-311 (2010) - [c5]Shunji Nakata, Hirotsugu Suzuki, Ryota Honda, Takahito Kusumoto, Shin'ichiro Mutoh, Hiroshi Makino, Masayuki Miyama, Yoshio Matsuda:
Adiabatic SRAM with a shared access port using a controlled ground line and step-voltage circuit. ISCAS 2010: 2474-2477
2000 – 2009
- 2009
- [c4]Shunji Nakata, Takahito Kusumoto, Masayuki Miyama, Yoshio Matsuda:
Adiabatic SRAM with a Large Margin of VT Variation by Controlling the Cell-power-line and Word-line Voltage. ISCAS 2009: 393-396 - 2008
- [j8]Yuichiro Murachi, Yuki Fukuyama, Ryo Yamamoto, Junichi Miyakoshi, Hiroshi Kawaguchi, Hajime Ishihara, Masayuki Miyama, Yoshio Matsuda, Masahiko Yoshimoto:
A VGA 30-fps Realtime Optical-Flow Processor Core for Moving Picture Recognition. IEICE Trans. Electron. 91-C(4): 457-464 (2008) - [j7]Masayuki Miyama, Yuusuke Inoie, Takafumi Kasuga, Ryouichi Inada, Masashi Nakao, Yoshio Matsuda:
A 158 MS/s JPEG 2000 Codec with a Bit-Plane and Pass Parallel Embedded Block Coder for Low Delay Image Transmission. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(8): 2025-2034 (2008) - 2000
- [j6]Toru Nakura, Kimio Ueda, Kazuo Kubo, Yoshio Matsuda, Koichiro Mashiko, Tsutomu Yoshihara:
A 3.6-Gb/s 340-mW 16: 1 pipe-lined multiplexer using 0.18 μm SOI-CMOS technology. IEEE J. Solid State Circuits 35(5): 751-756 (2000) - [c3]Hiroaki Suzuki, Hiroshi Making, Yoshio Matsuda:
Novel VLIW code compaction method for a 3D geometry processor. CICC 2000: 555-558
1990 – 1999
- 1999
- [j5]Yasunobu Nakase, Yoshikazu Morooka, David J. Perlman, Daniel J. Kolor, Jae-Myoung Choi, Hyun J. Shin, Tsutomu Yoshimura, Naoya Watanabe, Yoshio Matsuda, Masaki Kumanoya, Michihiro Yamada:
Source-synchronization and timing vernier techniques for 1.2-GB/s SLDRAM interface. IEEE J. Solid State Circuits 34(4): 494-501 (1999) - [j4]Hidehiro Takata, Tetsuya Watanabe, Tetsuo Nakajima, Takashi Takagaki, Hisakazu Sato, Atsushi Mohri, Akira Yamada, Toshiki Kanamoto, Yoshio Matsuda, Shuhei Iwade, Yasutaka Horiba:
The D30V/MPEG multimedia processor. IEEE Micro 19(4): 38-47 (1999) - 1997
- [j3]Hideaki Yamanaka, Hirotaka Saito, Harofusa Kondoh, Yasuhito Sasaki, Hirotoshi Yamada, Munenori Tsuzuki, Satoshi Nishio, Hiromi Notani, Atsushi Iwabu, Masahiko Ishiwaki, Shigeki Kohama, Yoshio Matsuda, Kazuyoshi Oshima:
Scalable Shared-Buffering ATM Switch with a Versatile Searchable Queue. IEEE J. Sel. Areas Commun. 15(5): 773-784 (1997) - 1996
- [j2]Tsutomu Yoshimura, Harufusa Kondoh, Yoshio Matsuda, Tadashi Sumi:
A 622-Mb/s bit/frame synchronizer for high-speed backplane data communication. IEEE J. Solid State Circuits 31(7): 1063-1066 (1996) - 1994
- [c2]Hirotaka Saito, Hideaki Yamanaka, Hirotoshi Yamada, Munenori Tsuzuki, Harofusa Kondoh, Yoshio Matsuda, Kazuyoshi Oshima:
Multicast Function and its LSI Implementation in a Shared Multibuffer ATM Switch. INFOCOM 1994: 315-322 - 1990
- [j1]Hideto Hidaka, Yoshio Matsuda, Mikio Asakura, Kazuyasu Fujishima:
The cache DRAM architecture: a DRAM with an on-chip cache memory. IEEE Micro 10(2): 14-25 (1990)
1980 – 1989
- 1989
- [c1]Yoshio Matsuda, Kazutami Arimoto, Masaki Tsukude, Tsukasa Oishi, Kazuyasu Fujishima:
A New Array Architecture for Parallel Testing in VLSI Memories. ITC 1989: 322-326
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-07 21:25 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
