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Rajeev Alur
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- affiliation: University of Pennsylvania, Philadelphia, PA, USA
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2020 – today
- 2024
- [j83]Anton Xue, Lars Lindemann, Rajeev Alur:
Chordal sparsity for SDP-based neural network verification. Autom. 161: 111487 (2024) - [c219]Ziyang Li, Jiani Huang, Jason Liu, Felix Zhu, Eric Zhao, William Dodds, Neelay Velingker, Rajeev Alur, Mayur Naik:
Relational Programming with Foundational Models. AAAI 2024: 10635-10644 - [c218]Haoran Zhang, Konstantinos Kallas, Spyros Pavlatos, Rajeev Alur, Sebastian Angel, Vincent Liu:
MuCache: A General Framework for Caching in Microservice Graphs. NSDI 2024: 221-238 - [c217]Chang Zhu, Ziyang Li, Anton Xue, Ati Priya Bajaj, Wil Gibbs, Yibo Liu, Rajeev Alur, Tiffany Bao, Hanjun Dai, Adam Doupé, Mayur Naik, Yan Shoshitaishvili, Ruoyu Wang, Aravind Machiry:
TYGR: Type Inference on Stripped Binaries using Graph Neural Networks. USENIX Security Symposium 2024 - [i37]Alaia Solko-Breslin, Seewon Choi, Ziyang Li, Neelay Velingker, Rajeev Alur, Mayur Naik, Eric Wong:
Data-Efficient Learning with Neural Programs. CoRR abs/2406.06246 (2024) - [i36]Anton Xue, Avishree Khare, Rajeev Alur, Surbhi Goel, Eric Wong:
Logicbreaks: A Framework for Understanding Subversion of Rule-based Inference. CoRR abs/2407.00075 (2024) - 2023
- [j82]Aalok Thakkar, Nathaniel Sands, George Petrou, Rajeev Alur, Mayur Naik, Mukund Raghothaman:
Mobius: Synthesizing Relational Queries with Recursive and Invented Predicates. Proc. ACM Program. Lang. 7(OOPSLA2): 1394-1417 (2023) - [j81]Konstantinos Kallas, Haoran Zhang, Rajeev Alur, Sebastian Angel, Vincent Liu:
Executing Microservice Applications on Serverless, Correctly. Proc. ACM Program. Lang. 7(POPL): 367-395 (2023) - [j80]Rajeev Alur, Caleb Stanford, Christopher Watson:
A Robust Theory of Series Parallel Graphs. Proc. ACM Program. Lang. 7(POPL): 1058-1088 (2023) - [j79]Aaditya Naik, Aalok Thakkar, Adam Stein, Rajeev Alur, Mayur Naik:
Relational Query Synthesis ⋈ Decision Tree Learning. Proc. VLDB Endow. 17(2): 250-263 (2023) - [c216]Rajeev Alur, Osbert Bastani, Kishor Jothimurugan, Mateo Perez, Fabio Somenzi, Ashutosh Trivedi:
Policy Synthesis and Reinforcement Learning for Discounted LTL. CAV (1) 2023: 415-435 - [c215]Kishor Jothimurugan, Steve Hsu, Osbert Bastani, Rajeev Alur:
Robust Subtask Learning for Compositional Generalization. ICML 2023: 15371-15387 - [c214]Anton Xue, Rajeev Alur, Eric Wong:
Stability Guarantees for Feature Attributions with Multiplicative Smoothing. NeurIPS 2023 - [i35]Kishor Jothimurugan, Steve Hsu, Osbert Bastani, Rajeev Alur:
Robust Subtask Learning for Compositional Generalization. CoRR abs/2302.02984 (2023) - [i34]Rajeev Alur, Osbert Bastani, Kishor Jothimurugan, Mateo Perez, Fabio Somenzi, Ashutosh Trivedi:
Policy Synthesis and Reinforcement Learning for Discounted LTL. CoRR abs/2305.17115 (2023) - [i33]Anton Xue, Rajeev Alur, Eric Wong:
Stability Guarantees for Feature Attributions with Multiplicative Smoothing. CoRR abs/2307.05902 (2023) - [i32]Avishree Khare, Saikat Dutta, Ziyang Li, Alaia Solko-Breslin, Rajeev Alur, Mayur Naik:
Understanding the Effectiveness of Large Language Models in Detecting Security Vulnerabilities. CoRR abs/2311.16169 (2023) - [i31]Rajeev Alur, Mikolaj Bojanczyk, Emmanuel Filiot, Anca Muscholl, Sarah Winter:
Regular Transformations (Dagstuhl Seminar 23202). Dagstuhl Reports 13(5): 96-113 (2023) - 2022
- [j78]Rajeev Alur, Joseph Devietti, Omar S. Navarro Leija, Nimit Singhania:
Static detection of uncoalesced accesses in GPU programs. Formal Methods Syst. Des. 60(1): 1-32 (2022) - [c213]Rajeev Alur, Suguman Bansal, Osbert Bastani, Kishor Jothimurugan:
A Framework for Transforming Specifications in Reinforcement Learning. Principles of Systems Design 2022: 604-624 - [c212]Kishor Jothimurugan, Suguman Bansal, Osbert Bastani, Rajeev Alur:
Specification-Guided Learning of Nash Equilibria with High Social Welfare. CAV (2) 2022: 343-363 - [c211]Anton Xue, Lars Lindemann, Alexander Robey, Hamed Hassani, George J. Pappas, Rajeev Alur:
Chordal Sparsity for Lipschitz Constant Estimation of Deep Neural Networks. CDC 2022: 3389-3396 - [c210]Caleb Stanford, Konstantinos Kallas, Rajeev Alur:
Correctness in Stream Processing: Challenges and Opportunities. CIDR 2022 - [c209]Konstantinos Kallas, Filip Niksic, Caleb Stanford, Rajeev Alur:
Stream processing with dependency-guided synchronization. PPoPP 2022: 1-16 - [c208]Lei Shi, Yuepeng Wang, Rajeev Alur, Boon Thau Loo:
Automatic Repair for Network Programs. TACAS (2) 2022: 353-372 - [i30]Anton Xue, Lars Lindemann, Alexander Robey, Hamed Hassani, George J. Pappas, Rajeev Alur:
Chordal Sparsity for Lipschitz Constant Estimation of Deep Neural Networks. CoRR abs/2204.00846 (2022) - [i29]Kishor Jothimurugan, Suguman Bansal, Osbert Bastani, Rajeev Alur:
Specification-Guided Learning of Nash Equilibria with High Social Welfare. CoRR abs/2206.03348 (2022) - [i28]Anton Xue, Lars Lindemann, Rajeev Alur:
Parametric Chordal Sparsity for SDP-based Neural Network Verification. CoRR abs/2206.03482 (2022) - [i27]Rajeev Alur, Taylor Dohmen, Ashutosh Trivedi:
Composing Copyless Streaming String Transducers. CoRR abs/2209.05448 (2022) - 2021
- [j77]Rajeev Alur, Dana Fisman:
Colored nested words. Formal Methods Syst. Des. 58(3): 347-374 (2021) - [j76]Radoslav Ivanov, Taylor J. Carpenter, James Weimer, Rajeev Alur, George J. Pappas, Insup Lee:
Verifying the Safety of Autonomous Systems with Neural Network Controllers. ACM Trans. Embed. Comput. Syst. 20(1): 7:1-7:26 (2021) - [j75]Radoslav Ivanov, Kishor Jothimurugan, Steve Hsu, Shaan Vaidya, Rajeev Alur, Osbert Bastani:
Compositional Learning and Verification of Neural Network Controllers. ACM Trans. Embed. Comput. Syst. 20(5s): 92:1-92:26 (2021) - [c207]Kishor Jothimurugan, Osbert Bastani, Rajeev Alur:
Abstract Value Iteration for Hierarchical Reinforcement Learning. AISTATS 2021: 1162-1170 - [c206]Radoslav Ivanov, Taylor J. Carpenter, James Weimer, Rajeev Alur, George J. Pappas, Insup Lee:
Verisig 2.0: Verification of Neural Network Controllers Using Taylor Model Preconditioning. CAV (1) 2021: 249-262 - [c205]Kishor Jothimurugan, Suguman Bansal, Osbert Bastani, Rajeev Alur:
Compositional Reinforcement Learning from Logical Specifications. NeurIPS 2021: 10026-10039 - [c204]Aalok Thakkar, Aaditya Naik, Nathaniel Sands, Rajeev Alur, Mayur Naik, Mukund Raghothaman:
Example-guided synthesis of relational queries. PLDI 2021: 1110-1125 - [c203]Rajeev Alur, Phillip Hilliard, Zachary G. Ives, Konstantinos Kallas, Konstantinos Mamouras, Filip Niksic, Caleb Stanford, Val Tannen, Anton Xue:
Synchronization Schemas. PODS 2021: 1-18 - [c202]Lei Shi, Yahui Li, Boon Thau Loo, Rajeev Alur:
Network Traffic Classification by Program Synthesis. TACAS (1) 2021: 430-448 - [i26]Konstantinos Kallas, Filip Niksic, Caleb Stanford, Rajeev Alur:
Stream Processing With Dependency-Guided Synchronization. CoRR abs/2104.04512 (2021) - [i25]Kishor Jothimurugan, Suguman Bansal, Osbert Bastani, Rajeev Alur:
Compositional Reinforcement Learning from Logical Specifications. CoRR abs/2106.13906 (2021) - [i24]Lei Shi, Yuepeng Wang, Rajeev Alur, Boon Thau Loo:
Orion: Automatic Repair for Network Programs. CoRR abs/2110.06303 (2021) - [i23]Rajeev Alur, Suguman Bansal, Osbert Bastani, Kishor Jothimurugan:
A Framework for Transforming Specifications in Reinforcement Learning. CoRR abs/2111.00272 (2021) - 2020
- [j74]Konstantinos Kallas, Filip Niksic, Caleb Stanford, Rajeev Alur:
DiffStream: differential output testing for stream processing programs. Proc. ACM Program. Lang. 4(OOPSLA): 153:1-153:29 (2020) - [j73]Rajeev Alur, Dana Fisman, Konstantinos Mamouras, Mukund Raghothaman, Caleb Stanford:
Streamable regular transductions. Theor. Comput. Sci. 807: 15-41 (2020) - [c201]Radoslav Ivanov, Taylor J. Carpenter, James Weimer, Rajeev Alur, George J. Pappas, Insup Lee:
Case study: verifying the safety of an autonomous racing car with a neural network controller. HSCC 2020: 28:1-28:7 - [c200]Rajeev Alur, Yu Chen, Kishor Jothimurugan, Sanjeev Khanna:
Space-efficient Query Evaluation over Probabilistic Event Streams. LICS 2020: 74-87 - [c199]Luan Viet Nguyen, Gautam Mohan, James Weimer, Oleg Sokolsky, Insup Lee, Rajeev Alur:
REAFFIRM: Model-Based Repair of Hybrid Systems for Improving Resiliency. MEMOCODE 2020: 1-12 - [i22]Rajeev Alur, Richard G. Baraniuk, Rastislav Bodík, Ann W. Drobnis, Sumit Gulwani, Bjoern Hartmann, Yasmin B. Kafai, Jeff Karpicke, Ran Libeskind-Hadas, Debra J. Richardson, Armando Solar-Lezama, Candace Thille, Moshe Y. Vardi:
Computer-Aided Personalized Education. CoRR abs/2007.03704 (2020) - [i21]Kishor Jothimurugan, Rajeev Alur, Osbert Bastani:
A Composable Specification Language for Reinforcement Learning Tasks. CoRR abs/2008.09293 (2020) - [i20]Lei Shi, Yahui Li, Rajeev Alur, Boon Thau Loo:
Session-layer Attack Traffic Classification by Program Synthesis. CoRR abs/2010.06135 (2020) - [i19]Kishor Jothimurugan, Osbert Bastani, Rajeev Alur:
Abstract Value Iteration for Hierarchical Reinforcement Learning. CoRR abs/2010.15638 (2020)
2010 – 2019
- 2019
- [j72]Rajeev Alur, Konstantinos Mamouras, Caleb Stanford:
Modular quantitative monitoring. Proc. ACM Program. Lang. 3(POPL): 50:1-50:31 (2019) - [c198]Radoslav Ivanov, James Weimer, Rajeev Alur, George J. Pappas, Insup Lee:
Verisig: verifying safety properties of hybrid systems with neural network controllers. HSCC 2019: 169-178 - [c197]Luan Viet Nguyen, Gautam Mohan, James Weimer, Oleg Sokolsky, Insup Lee, Rajeev Alur:
Detecting security leaks in hybrid systems with information flow analysis. MEMOCODE 2019: 14:1-14:11 - [c196]Kishor Jothimurugan, Rajeev Alur, Osbert Bastani:
A Composable Specification Language for Reinforcement Learning Tasks. NeurIPS 2019: 13021-13030 - [c195]Konstantinos Mamouras, Caleb Stanford, Rajeev Alur, Zachary G. Ives, Val Tannen:
Data-trace types for distributed stream processing systems. PLDI 2019: 670-685 - [p4]Rajeev Alur, Mirco Giacobbe, Thomas A. Henzinger, Kim G. Larsen, Marius Mikucionis:
Continuous-Time Models for System Design and Analysis. Computing and Software Science 2019: 452-477 - [i18]Luan Viet Nguyen, Gautam Mohan, James Weimer, Oleg Sokolsky, Insup Lee, Rajeev Alur:
REAFFIRM: Model-Based Repair of Hybrid Systems for Improving Resiliency. CoRR abs/1902.04064 (2019) - [i17]Rajeev Alur, Dana Fisman, Saswat Padhi, Rishabh Singh, Abhishek Udupa:
SyGuS-Comp 2018: Results and Analysis. CoRR abs/1904.07146 (2019) - [i16]Radoslav Ivanov, Taylor J. Carpenter, James Weimer, Rajeev Alur, George J. Pappas, Insup Lee:
Case Study: Verifying the Safety of an Autonomous Racing Car with a Neural Network Controller. CoRR abs/1910.11309 (2019) - 2018
- [j71]Rajeev Alur, Rishabh Singh, Dana Fisman, Armando Solar-Lezama:
Search-based program synthesis. Commun. ACM 61(12): 84-93 (2018) - [j70]Rajeev Alur, Salar Moarref, Ufuk Topcu:
Compositional and symbolic synthesis of reactive controllers for multi-agent systems. Inf. Comput. 261: 616-633 (2018) - [j69]Houssam Abbas, Rajeev Alur, Konstantinos Mamouras, Rahul Mangharam, Alëna Rodionova:
Real-Time Decision Policies With Predictable Performance. Proc. IEEE 106(9): 1593-1615 (2018) - [j68]Yifei Yuan, Dong Lin, Siri Anil, Harsh Verma, Anirudh Chelluri, Rajeev Alur, Boon Thau Loo:
NetEgg: A Scenario-Based Programming Toolkit for SDN Policies. IEEE/ACM Trans. Netw. 26(5): 2104-2117 (2018) - [c194]Rajeev Alur, Konstantinos Mamouras, Caleb Stanford, Val Tannen:
Interfaces for Stream Processing Systems. Principles of Modeling 2018: 38-60 - [c193]Houssam Abbas, Rajeev Alur, Konstantinos Mamouras, Rahul Mangharam, Alëna Rodionova:
Quantitative Regular Expressions for Monitoring Cardiac Arrhythmias. MT@CPSWeek 2018: 1-2 - [c192]Woosuk Lee, Kihong Heo, Rajeev Alur, Mayur Naik:
Accelerating search-based program synthesis using learned probabilistic models. PLDI 2018: 436-449 - [c191]Rajeev Alur, Joseph Devietti, Nimit Singhania:
Block-Size Independence for GPU Programs. SAS 2018: 107-126 - [p3]Rajeev Alur, Ahmed Bouajjani, Javier Esparza:
Model Checking Procedural Programs. Handbook of Model Checking 2018: 541-572 - [i15]Rajeev Alur, Dana Fisman, Konstantinos Mamouras, Mukund Raghothaman, Caleb Stanford:
Streamable Regular Transductions. CoRR abs/1807.03865 (2018) - [i14]Shaull Almagor, Rajeev Alur, Suguman Bansal:
Equilibria in Quantitative Concurrent Games. CoRR abs/1809.10503 (2018) - [i13]Radoslav Ivanov, James Weimer, Rajeev Alur, George J. Pappas, Insup Lee:
Verisig: verifying safety properties of hybrid systems with neural network controllers. CoRR abs/1811.01828 (2018) - 2017
- [j67]Rajeev Alur, Loris D'Antoni:
Streaming Tree Transducers. J. ACM 64(5): 31:1-31:55 (2017) - [j66]Rajeev Alur, Stavros Tripakis:
Automatic Synthesis of Distributed Protocols. SIGACT News 48(1): 55-90 (2017) - [j65]Rajeev Alur, Vojtech Forejt, Salar Moarref, Ashutosh Trivedi:
Schedulability of Bounded-Rate Multimode Systems. ACM Trans. Embed. Comput. Syst. 16(3): 85:1-85:27 (2017) - [c190]Rajeev Alur, Konstantinos Mamouras, Dogan Ulus:
Derivatives of Quantitative Regular Expressions. Models, Algorithms, Logics and Tools 2017: 75-95 - [c189]Rajeev Alur, Joseph Devietti, Omar S. Navarro Leija, Nimit Singhania:
GPUDrano: Detecting Uncoalesced Accesses in GPU Programs. CAV (1) 2017: 507-525 - [c188]Rajeev Alur, Konstantinos Mamouras, Caleb Stanford:
Automata-Based Stream Processing. ICALP 2017: 112:1-112:15 - [c187]Konstantinos Mamouras, Mukund Raghothaman, Rajeev Alur, Zachary G. Ives, Sanjeev Khanna:
StreamQRE: modular specification and efficient evaluation of quantitative queries over streaming data. PLDI 2017: 693-708 - [c186]Yifei Yuan, Dong Lin, Ankit Mishra, Sajal Marwaha, Rajeev Alur, Boon Thau Loo:
Quantitative Network Monitoring with NetQRE. SIGCOMM 2017: 99-112 - [c185]Rajeev Alur, Arjun Radhakrishna, Abhishek Udupa:
Scaling Enumerative Program Synthesis via Divide and Conquer. TACAS (1) 2017: 319-336 - [c184]Rajeev Alur, Dana Fisman, Rishabh Singh, Armando Solar-Lezama:
SyGuS-Comp 2017: Results and Analysis. SYNT@CAV 2017: 97-115 - [p2]Rajeev Alur, Konstantinos Mamouras:
An Introduction to the StreamQRE Language. Dependable Software Systems Engineering 2017: 1-24 - 2016
- [c183]Rajeev Alur, Salar Moarref, Ufuk Topcu:
Compositional Synthesis of Reactive Controllers for Multi-agent Systems. CAV (2) 2016: 251-269 - [c182]Rajeev Alur, Marco Faella, Sampath Kannan, Nimit Singhania:
Hedging Bets in Markov Decision Processes. CSL 2016: 29:1-29:20 - [c181]Rajeev Alur, Dana Fisman, Mukund Raghothaman:
Regular Programming for Quantitative Properties of Data Streams. ESOP 2016: 15-40 - [c180]Rajeev Alur, Salar Moarref, Ufuk Topcu:
Compositional Synthesis with Parametric Reactive Controllers. HSCC 2016: 215-224 - [c179]Rajeev Alur, Dana Fisman:
Colored Nested Words. LATA 2016: 143-155 - [c178]Rajeev Alur, Dana Fisman, Rishabh Singh, Armando Solar-Lezama:
SyGuS-Comp 2016: Results and Analysis. SYNT@CAV 2016: 178-202 - [i12]Rajeev Alur, Emery D. Berger, Ann W. Drobnis, Limor Fix, Kevin Fu, Gregory D. Hager, Daniel P. Lopresti, Klara Nahrstedt, Elizabeth D. Mynatt, Shwetak N. Patel, Jennifer Rexford, John A. Stankovic, Benjamin G. Zorn:
Systems Computing Challenges in the Internet of Things. CoRR abs/1604.02980 (2016) - 2015
- [j64]Loris D'Antoni, Matthew Weavery, Alexander Weinert, Rajeev Alur:
Automata Tutor and what we learned from building an online teaching tool. Bull. EATCS 117 (2015) - [j63]Rajeev Alur, Thomas A. Henzinger, Moshe Y. Vardi:
Theory in practice for system design and verification. ACM SIGLOG News 2(1): 46-51 (2015) - [j62]Loris D'Antoni, Dileep Kini, Rajeev Alur, Sumit Gulwani, Mahesh Viswanathan, Björn Hartmann:
How Can Automatic Feedback Help Students Construct Automata? ACM Trans. Comput. Hum. Interact. 22(2): 9:1-9:24 (2015) - [c177]Rajeev Alur, Pavol Cerný, Arjun Radhakrishna:
Synthesis Through Unification. CAV (2) 2015: 163-179 - [c176]Rajeev Alur, Mukund Raghothaman, Christos Stergiou, Stavros Tripakis, Abhishek Udupa:
Automatic Completion of Distributed Protocols with Symmetry. CAV (2) 2015: 395-412 - [c175]Yifei Yuan, Dong Lin, Rajeev Alur, Boon Thau Loo:
Scenario-based programming for SDN policies. CoNEXT 2015: 34:1-34:13 - [c174]Rajeev Alur:
Keynote talk I: Syntax-guided synthesis. MEMOCODE 2015: 1 - [c173]Rajeev Alur, Loris D'Antoni, Mukund Raghothaman:
DReX: A Declarative Language for Efficiently Evaluating Regular String Transformations. POPL 2015: 125-137 - [c172]Rajeev Alur, Salar Moarref, Ufuk Topcu:
Pattern-Based Refinement of Assume-Guarantee Specifications in Reactive Synthesis. TACAS 2015: 501-516 - [c171]Rajeev Alur, Dana Fisman, Rishabh Singh, Armando Solar-Lezama:
Results and Analysis of SyGuS-Comp'15. SYNT 2015: 3-26 - [p1]Rajeev Alur, Rastislav Bodík, Eric Dallal, Dana Fisman, Pranav Garg, Garvit Juniwal, Hadas Kress-Gazit, P. Madhusudan, Milo M. K. Martin, Mukund Raghothaman, Shambwaditya Saha, Sanjit A. Seshia, Rishabh Singh, Armando Solar-Lezama, Emina Torlak, Abhishek Udupa:
Syntax-Guided Synthesis. Dependable Software Systems Engineering 2015: 1-25 - [i11]Rajeev Alur, Mukund Raghothaman, Christos Stergiou, Stavros Tripakis, Abhishek Udupa:
Automatic Completion of Distributed Protocols with Symmetry. CoRR abs/1505.04409 (2015) - [i10]Rajeev Alur, Pavol Cerný, Arjun Radhakrishna:
Synthesis through Unification. CoRR abs/1505.05868 (2015) - 2014
- [j61]Zhihao Jiang, Miroslav Pajic, Rajeev Alur, Rahul Mangharam:
Closed-loop verification of medical devices with model abstraction and refinement. Int. J. Softw. Tools Technol. Transf. 16(2): 191-213 (2014) - [c170]Loris D'Antoni, Rajeev Alur:
Symbolic Visibly Pushdown Automata. CAV 2014: 209-225 - [c169]Rajeev Alur, Adam Freilich, Mukund Raghothaman:
Regular combinators for string transformations. CSL-LICS 2014: 9:1-9:10 - [c168]Rajeev Alur, Nimit Singhania:
Precise piecewise affine models from input-output data. EMSOFT 2014: 3:1-3:10 - [c167]Yifei Yuan, Rajeev Alur, Boon Thau Loo:
NetEgg: Programming Network Policies by Examples. HotNets 2014: 20:1-20:7 - [c166]Rajeev Alur, Milo M. K. Martin, Mukund Raghothaman, Christos Stergiou, Stavros Tripakis, Abhishek Udupa:
Synthesizing Finite-State Protocols from Scenarios and Requirements. Haifa Verification Conference 2014: 75-91 - [i9]Rajeev Alur, Adam Freilich, Mukund Raghothaman:
Regular Combinators for String Transformations. CoRR abs/1402.3021 (2014) - [i8]Rajeev Alur, Milo M. K. Martin, Mukund Raghothaman, Christos Stergiou, Stavros Tripakis, Abhishek Udupa:
Synthesizing Finite-state Protocols from Scenarios and Requirements. CoRR abs/1402.7150 (2014) - 2013
- [j60]Rajeev Alur:
Can we verify cyber-physical systems?: technical perspective. Commun. ACM 56(10): 96 (2013) - [c165]Rajeev Alur, Rastislav Bodík, Garvit Juniwal, Milo M. K. Martin, Mukund Raghothaman, Sanjit A. Seshia, Rishabh Singh, Armando Solar-Lezama, Emina Torlak, Abhishek Udupa:
Syntax-guided synthesis. FMCAD 2013: 1-8 - [c164]Rajeev Alur, Salar Moarref, Ufuk Topcu:
Counter-strategy guided refinement of GR(1) temporal logic specifications. FMCAD 2013: 26-33 - [c163]Yifei Yuan, Anduo Wang, Rajeev Alur, Boon Thau Loo:
On the feasibility of automation for bandwidth allocation problems in data centers. FMCAD 2013: 42-45 - [c162]Jay Thakkar, Aditya Kanade, Rajeev Alur:
Transducer-Based Algorithmic Verification of Retransmission Protocols over Noisy Channels. FMOODS/FORTE 2013: 209-224 - [c161]Miroslav Pajic, Nicola Bezzo, James Weimer, Rajeev Alur, Rahul Mangharam, Nathan Michael, George J. Pappas, Oleg Sokolsky, Paulo Tabuada, Stephanie Weirich, Insup Lee:
Towards synthesis of platform-aware attack-resilient control systems: extended abstract. HiCoNS 2013: 75-76 - [c160]Rajeev Alur, Vojtech Forejt, Salar Moarref, Ashutosh Trivedi:
Safe schedulability of bounded-rate multi-mode systems. HSCC 2013: 243-252 - [c159]Rajeev Alur, Mukund Raghothaman:
Decision Problems for Additive Regular Functions. ICALP (2) 2013: 37-48 - [c158]Rajeev Alur, Loris D'Antoni, Sumit Gulwani, Dileep Kini, Mahesh Viswanathan:
Automated Grading of DFA Constructions. IJCAI 2013: 1976-1982 - [c157]Rajeev Alur, Sampath Kannan, Kevin Tian, Yifei Yuan:
On the Complexity of Shortest Path Problems on Discounted Cost Graphs. LATA 2013: 44-55 - [c156]Rajeev Alur, Loris D'Antoni, Jyotirmoy V. Deshmukh, Mukund Raghothaman, Yifei Yuan:
Regular Functions and Cost Register Automata. LICS 2013: 13-22 - [c155]Rajeev Alur, Antoine Durand-Gasselin, Ashutosh Trivedi:
From Monadic Second-Order Definable String Transformations to Transducers. LICS 2013: 458-467 - [c154]Rajeev Alur:
Tutorial I: Syntax-guided synthesis. MEMOCODE 2013: 189-194 - [c153]Abhishek Udupa, Arun Raghavan, Jyotirmoy V. Deshmukh, Sela Mador-Haim, Milo M. K. Martin, Rajeev Alur:
TRANSIT: specifying protocols with concolic snippets. PLDI 2013: 287-296 - [i7]Rajeev Alur, Vojtech Forejt, Salar Moarref, Ashutosh Trivedi:
Safe Schedulability of Bounded-Rate Multi-Mode Systems. CoRR abs/1302.0745 (2013) - [i6]Rajeev Alur, Mukund Raghothaman:
Decision Problems for Additive Regular Functions. CoRR abs/1304.7029 (2013) - [i5]Rajeev Alur, Salar Moarref, Ufuk Topcu:
Counter-Strategy Guided Refinement of GR(1) Temporal Logic Specifications. CoRR abs/1308.4113 (2013) - 2012
- [j59]Orna Grumberg, Moshe Y. Vardi, Joseph Sifakis, Rajeev Alur:
2010 CAV award announcement. Formal Methods Syst. Des. 40(2): 117-120 (2012) - [j58]Moshe Y. Vardi, Thomas A. Henzinger, Rajeev Alur, Marta Z. Kwiatkowska:
2011 CAV award announcement. Formal Methods Syst. Des. 41(1): 1-2 (2012) - [j57]Truong Nghiem, George J. Pappas, Rajeev Alur, Antoine Girard:
Time-Triggered Implementations of Dynamic Controllers. ACM Trans. Embed. Comput. Syst. 11(S2): 58:1-58:24 (2012) - [j56]Rajeev Alur, Pavol Cerný, Scott Weinstein:
Algorithmic analysis of array-accessing programs. ACM Trans. Comput. Log. 13(3): 27:1-27:29 (2012) - [c152]Sela Mador-Haim, Luc Maranget, Susmit Sarkar, Kayvan Memarian, Jade Alglave, Scott Owens, Rajeev Alur, Milo M. K. Martin, Peter Sewell, Derek Williams:
An Axiomatic Memory Model for POWER Multiprocessors. CAV 2012: 495-512 - [c151]Rajeev Alur, Ashutosh Trivedi, Dominik Wojtczak:
Optimal scheduling for constant-rate multi-mode systems. HSCC 2012: 75-84 - [c150]Rajeev Alur, Loris D'Antoni:
Streaming Tree Transducers. ICALP (2) 2012: 42-53 - [c149]Rajeev Alur, Emmanuel Filiot, Ashutosh Trivedi:
Regular Transformations of Infinite Strings. LICS 2012: 65-74 - [c148]Zhihao Jiang, Miroslav Pajic, Salar Moarref, Rajeev Alur, Rahul Mangharam:
Modeling and Verification of a Dual Chamber Implantable Pacemaker. TACAS 2012: 188-203 - 2011
- [j55]Rajeev Alur, Alessandro D'Innocenzo, Karl Henrik Johansson, George J. Pappas, Gera Weiss:
Compositional Modeling and Analysis of Multi-Hop Control Networks. IEEE Trans. Autom. Control. 56(10): 2345-2357 (2011) - [j54]Rajeev Alur, Swarat Chaudhuri, P. Madhusudan:
Software model checking using languages of nested trees. ACM Trans. Program. Lang. Syst. 33(5): 15:1-15:45 (2011) - [c147]Sela Mador-Haim, Rajeev Alur, Milo M. K. Martin:
Litmus tests for comparing memory consistency models: how long do they need to be? DAC 2011: 504-509 - [c146]Rajeev Alur, Ashutosh Trivedi:
Relating average and discounted costs for quantitative analysis of timed systems. EMSOFT 2011: 165-174 - [c145]Rajeev Alur:
Formal verification of hybrid systems. EMSOFT 2011: 273-278 - [c144]Rajeev Alur:
Interfaces for Control Components. FORMATS 2011: 25 - [c143]Rajeev Alur, Jyotirmoy V. Deshmukh:
Nondeterministic Streaming String Transducers. ICALP (2) 2011: 1-20 - [c142]Rajeev Alur, Pavol Cerný:
Streaming transducers for algorithmic verification of single-pass list-processing programs. POPL 2011: 599-610 - [c141]Rajeev Alur:
Streaming String Transducers. WoLLIC 2011: 1 - [i4]Rajeev Alur, Loris D'Antoni:
Streaming Tree Transducers. CoRR abs/1104.2599 (2011) - [i3]Rajeev Alur, Loris D'Antoni, Jyotirmoy V. Deshmukh, Mukund Raghothaman, Yifei Yuan:
Regular Functions, Cost Register Automata, and Generalized Min-Cost Problems. CoRR abs/1111.0670 (2011) - 2010
- [j53]Wonhong Nam, Rajeev Alur:
Active Learning of Plans for Safety and Reachability Goals With Partial Observability. IEEE Trans. Syst. Man Cybern. Part B 40(2): 412-420 (2010) - [c140]Sela Mador-Haim, Rajeev Alur, Milo M. K. Martin:
Generating Litmus Tests for Contrasting Memory Consistency Models. CAV 2010: 273-287 - [c139]Pavol Cerný, Arjun Radhakrishna, Damien Zufferey, Swarat Chaudhuri, Rajeev Alur:
Model Checking of Linearizability of Concurrent List Implementations. CAV 2010: 465-479 - [c138]Rajeev Alur, Pavol Cerný:
Expressiveness of streaming string transducers. FSTTCS 2010: 1-12 - [c137]Aditya Kanade, Rajeev Alur, Sriram K. Rajamani, Ganesan Ramalingam:
Representation dependence testing using program inversion. SIGSOFT FSE 2010: 277-286 - [c136]Rajeev Alur, Swarat Chaudhuri:
Temporal Reasoning for Procedural Programs. VMCAI 2010: 45-60 - [i2]Rajeev Alur, Pavol Cerný:
Algorithmic Verification of Single-Pass List Processing Programs. CoRR abs/1007.4958 (2010)
2000 – 2009
- 2009
- [j52]Rajeev Alur, P. Madhusudan:
Adding nesting structure to words. J. ACM 56(3): 16:1-16:43 (2009) - [c135]Alessandro D'Innocenzo, Gera Weiss, Rajeev Alur, Alf J. Isaksson, Karl Henrik Johansson, George J. Pappas:
Scalable scheduling algorithms for wireless networked control systems. CASE 2009: 409-414 - [c134]Pavol Cerný, Rajeev Alur:
Automated Analysis of Java Methods for Confidentiality. CAV 2009: 173-187 - [c133]Aditya Kanade, Rajeev Alur, Franjo Ivancic, S. Ramesh, Sriram Sankaranarayanan, K. C. Shashidhar:
Generating and Analyzing Symbolic Traces of Simulink/Stateflow Models. CAV 2009: 430-445 - [c132]Gera Weiss, Alessandro D'Innocenzo, Rajeev Alur, Karl Henrik Johansson, George J. Pappas:
Robust stability of multi-hop control networks. CDC 2009: 2210-2215 - [c131]Rajeev Alur, Pavol Cerný, Scott Weinstein:
Algorithmic Analysis of Array-Accessing Programs. CSL 2009: 86-101 - [c130]Rajeev Alur:
Temporal Reasoning about Program Executions. FoSSaCS 2009: 15 - [c129]Rajeev Alur, Aldric Degorre, Oded Maler, Gera Weiss:
On Omega-Languages Defined by Mean-Payoff Conditions. FoSSaCS 2009: 333-347 - [c128]Gera Weiss, Sebastian Fischmeister, Madhukar Anand, Rajeev Alur:
Specification and Analysis of Network Resource Requirements of Control Systems. HSCC 2009: 381-395 - [c127]Rajeev Alur, Alessandro D'Innocenzo, Karl Henrik Johansson, George J. Pappas, Gera Weiss:
Modeling and Analysis of Multi-hop Control Networks. IEEE Real-Time and Embedded Technology and Applications Symposium 2009: 223-232 - 2008
- [j51]Rajeev Alur, George J. Pappas:
Introduction. Formal Methods Syst. Des. 32(1): 1 (2008) - [j50]Wonhong Nam, P. Madhusudan, Rajeev Alur:
Automatic symbolic compositional verification by learning assumptions. Formal Methods Syst. Des. 32(3): 207-234 (2008) - [j49]Rajeev Alur, Marcelo Arenas, Pablo Barceló, Kousha Etessami, Neil Immerman, Leonid Libkin:
First-Order and Temporal Logics for Nested Words. Log. Methods Comput. Sci. 4(4) (2008) - [c126]Rajeev Alur:
Marrying Words and Trees. AMAST 2008: 1 - [c125]Rajeev Alur, Aditya Kanade, Gera Weiss:
Ranking Automata and Games for Prioritized Requirements. CAV 2008: 240-253 - [c124]Rajeev Alur, Aditya Kanade, S. Ramesh, K. C. Shashidhar:
Symbolic analysis for improving simulation coverage of Simulink/Stateflow models. EMSOFT 2008: 89-98 - [c123]Rajeev Alur, Gera Weiss:
RTComposer: a framework for real-time components with scheduling interfaces. EMSOFT 2008: 159-168 - [c122]Rajeev Alur, Gera Weiss:
Regular Specifications of Resource Requirements for Embedded Control Software. IEEE Real-Time and Embedded Technology and Applications Symposium 2008: 159-168 - [c121]Rajeev Alur:
Model Checking: From Tools to Theory. 25 Years of Model Checking 2008: 89-106 - [i1]Rajeev Alur, Marcelo Arenas, Pablo Barceló, Kousha Etessami, Neil Immerman, Leonid Libkin:
First-Order and Temporal Logics for Nested Words. CoRR abs/0811.0537 (2008) - 2007
- [j48]Rajeev Alur, Arun Chandrashekharapuram:
Dispatch sequences for embedded control models. J. Comput. Syst. Sci. 73(2): 156-170 (2007) - [c120]Rajeev Alur:
Marrying Words and Trees. CSR 2007: 5 - [c119]Mikhail Bernadsky, Rajeev Alur:
Symbolic Analysis for GSMP Models with One Stateful Clock. HSCC 2007: 90-103 - [c118]Gera Weiss, Rajeev Alur:
Automata Based Interfaces for Control and Scheduling. HSCC 2007: 601-613 - [c117]Rajeev Alur, Marcelo Arenas, Pablo Barceló, Kousha Etessami, Neil Immerman, Leonid Libkin:
First-Order and Temporal Logics for Nested Words. LICS 2007: 151-160 - [c116]Sebastian Burckhardt, Rajeev Alur, Milo M. K. Martin:
CheckFence: checking consistency of concurrent data types on relaxed memory models. PLDI 2007: 12-21 - [c115]Rajeev Alur:
Marrying words and trees. PODS 2007: 233-242 - [c114]Swarat Chaudhuri, Rajeev Alur:
Instrumenting C Programs with Nested Word Monitors. SPIN 2007: 279-283 - [c113]Rajeev Alur, Pavol Cerný, Swarat Chaudhuri:
Model Checking on Trees with Path Equivalences. TACAS 2007: 664-678 - 2006
- [j47]Rajeev Alur, Radu Grosu, Insup Lee, Oleg Sokolsky:
Compositional modeling and refinement for hierarchical hybrid systems. J. Log. Algebraic Methods Program. 68(1-2): 105-128 (2006) - [j46]Rajeev Alur, Salvatore La Torre, P. Madhusudan:
Modular strategies for recursive game graphs. Theor. Comput. Sci. 354(2): 230-249 (2006) - [j45]Rajeev Alur, Thao Dang, Franjo Ivancic:
Counterexample-guided predicate abstraction of hybrid systems. Theor. Comput. Sci. 354(2): 250-271 (2006) - [j44]Rajeev Alur, Thao Dang, Franjo Ivancic:
Predicate abstraction for reachability analysis of hybrid systems. ACM Trans. Embed. Comput. Syst. 5(1): 152-199 (2006) - [c112]Wonhong Nam, Rajeev Alur:
Learning-Based Symbolic Assume-Guarantee Reasoning with Automatic Decomposition. ATVA 2006: 170-185 - [c111]Rajeev Alur, Swarat Chaudhuri, P. Madhusudan:
Languages of Nested Trees. CAV 2006: 329-342 - [c110]Sebastian Burckhardt, Rajeev Alur, Milo M. K. Martin:
Bounded Model Checking of Concurrent Data Types on Relaxed Memory Models: A Case Study. CAV 2006: 489-502 - [c109]Rajeev Alur, P. Madhusudan:
Adding Nesting Structure to Words. Developments in Language Theory 2006: 1-13 - [c108]Truong Nghiem, George J. Pappas, Rajeev Alur, Antoine Girard:
Time-triggered implementations of dynamic controllers. EMSOFT 2006: 2-11 - [c107]Rajeev Alur, Swarat Chaudhuri:
Branching Pushdown Tree Automata. FSTTCS 2006: 393-404 - [c106]Rajeev Alur, Mikhail Bernadsky:
Bounded Model Checking for GSMP Models of Stochastic Real-Time Systems. HSCC 2006: 19-33 - [c105]Rajeev Alur, Pavol Cerný, Steve Zdancewic:
Preserving Secrecy Under Refinement. ICALP (2) 2006: 107-118 - [c104]Rajeev Alur:
Games for formal design and verification of reactive systems. MEMOCODE 2006: 3 - [c103]Rajeev Alur, Swarat Chaudhuri, P. Madhusudan:
A fixpoint calculus for local and global program flows. POPL 2006: 153-165 - 2005
- [j43]Rajeev Alur, Kenneth L. McMillan, Doron A. Peled:
Deciding Global Partial-Order Properties. Formal Methods Syst. Des. 26(1): 7-25 (2005) - [j42]Rajeev Alur, P. Madhusudan, Wonhong Nam:
Symbolic computational techniques for solving games. Int. J. Softw. Tools Technol. Transf. 7(2): 118-128 (2005) - [j41]Rajeev Alur, Kousha Etessami, Mihalis Yannakakis:
Realizability and verification of MSC graphs. Theor. Comput. Sci. 331(1): 97-114 (2005) - [j40]Rajeev Alur, Insup Lee:
Preface. ACM Trans. Embed. Comput. Syst. 4(4): 707 (2005) - [j39]Rajeev Alur, Michael Benedikt, Kousha Etessami, Patrice Godefroid, Thomas W. Reps, Mihalis Yannakakis:
Analysis of recursive state machines. ACM Trans. Program. Lang. Syst. 27(4): 786-818 (2005) - [c102]Rajeev Alur, P. Madhusudan, Wonhong Nam:
Symbolic Compositional Verification by Learning Assumptions. CAV 2005: 548-562 - [c101]Rajeev Alur:
The Benefits of Exposing Calls and Returns. CONCUR 2005: 2-3 - [c100]Rajeev Alur, Salvatore La Torre, P. Madhusudan:
Perturbed Timed Automata. HSCC 2005: 70-85 - [c99]Rajeev Alur, Viraj Kumar, P. Madhusudan, Mahesh Viswanathan:
Congruences for Visibly Pushdown Languages. ICALP 2005: 1102-1114 - [c98]Rajeev Alur, Pavol Cerný, P. Madhusudan, Wonhong Nam:
Synthesis of interface specifications for Java classes. POPL 2005: 98-109 - [c97]Rajeev Alur, Arun Chandrashekharapuram:
Dispatch Sequences for Embedded Control Models. IEEE Real-Time and Embedded Technology and Applications Symposium 2005: 508-518 - [c96]Hakan Yazarel, Antoine Girard, George J. Pappas, Rajeev Alur:
Quantifying the Gap between Embedded Control Models and Time-Triggered Implementations. RTSS 2005: 111-120 - [c95]Rajeev Alur, Swarat Chaudhuri, Kousha Etessami, P. Madhusudan:
On-the-Fly Reachability and Cycle Detection for Recursive State Machines. TACAS 2005: 61-76 - [c94]Sebastian Burckhardt, Rajeev Alur, Milo M. K. Martin:
Verifying Safety of a Token Coherence Implementation by Parametric Compositional Refinement. VMCAI 2005: 130-145 - [c93]Rajeev Alur:
Trends and Challenges in Algorithmic Software Verification. VSTTE 2005: 245-250 - 2004
- [j38]Rajeev Alur, Sampath Kannan, Salvatore La Torre:
Polyhedral Flows in Hybrid Automata. Formal Methods Syst. Des. 24(3): 261-280 (2004) - [j37]Rajeev Alur, David Arney, Elsa L. Gunter, Insup Lee, Jaime Lee, Wonhong Nam, Frederick Pearce, Stephen Van Albert, Jiaxiang Zhou:
Formal specifications and analysis of the computer-assisted resuscitation algorithm (CARA) Infusion Pump Control System. Int. J. Softw. Tools Technol. Transf. 5(4): 308-319 (2004) - [j36]Rajeev Alur, Salvatore La Torre, George J. Pappas:
Optimal paths in weighted timed automata. Theor. Comput. Sci. 318(3): 297-322 (2004) - [j35]Rajeev Alur, Salvatore La Torre:
Deterministic generators and games for Ltl fragments. ACM Trans. Comput. Log. 5(1): 1-25 (2004) - [j34]Rajeev Alur, Radu Grosu:
Modular refinement of hierarchic reactive machines. ACM Trans. Program. Lang. Syst. 26(2): 339-369 (2004) - [c92]Rajeev Alur:
Games for Formal Design and Verification of Reactive Systems. ATVA 2004: 1 - [c91]Michael McDougall, Rajeev Alur, Carl A. Gunter:
A model-based approach to integrating security policies for embedded devices. EMSOFT 2004: 211-219 - [c90]Zijiang Yang, Rajeev Alur:
Variable Reuse for Efficient Image Computation. FMCAD 2004: 430-444 - [c89]Mikhail Bernadsky, Raman Sharykin, Rajeev Alur:
Structured Modeling of Concurrent Stochastic Hybrid Systems. FORMATS/FTRTFT 2004: 309-324 - [c88]Rajeev Alur, Mikhail Bernadsky, P. Madhusudan:
Optimal Reachability for Weighted Timed Games. ICALP 2004: 122-133 - [c87]Rajeev Alur, P. Madhusudan:
Decision Problems for Timed Automata: A Survey. SFM 2004: 1-24 - [c86]Rajeev Alur, P. Madhusudan:
Visibly pushdown languages. STOC 2004: 202-211 - [c85]Rajeev Alur, Kousha Etessami, P. Madhusudan:
A Temporal Logic of Nested Calls and Returns. TACAS 2004: 467-481 - [e5]Rajeev Alur, Doron A. Peled:
Computer Aided Verification, 16th International Conference, CAV 2004, Boston, MA, USA, July 13-17, 2004, Proceedings. Lecture Notes in Computer Science 3114, Springer 2004, ISBN 3-540-22342-8 [contents] - [e4]Rajeev Alur, George J. Pappas:
Hybrid Systems: Computation and Control, 7th International Workshop, HSCC 2004, Philadelphia, PA, USA, March 25-27, 2004, Proceedings. Lecture Notes in Computer Science 2993, Springer 2004, ISBN 3-540-21259-0 [contents] - 2003
- [j33]Rajeev Alur, Thao Dang, Joel M. Esposito, Yerang Hur, Franjo Ivancic, Vijay Kumar, Insup Lee, Pradyumna Mishra, George J. Pappas, Oleg Sokolsky:
Hierarchical modeling and analysis of embedded systems. Proc. IEEE 91(1): 11-28 (2003) - [j32]Rajeev Alur, Kousha Etessami, Mihalis Yannakakis:
Inference of Message Sequence Charts. IEEE Trans. Software Eng. 29(7): 623-633 (2003) - [c84]Rajeev Alur:
Formal Analysis of Hierarchical State Machines. Verification: Theory and Practice 2003: 42-66 - [c83]Rajeev Alur, Salvatore La Torre, P. Madhusudan:
Modular Strategies for Infinite Games on Recursive Graphs. CAV 2003: 67-79 - [c82]Rajeev Alur, Swarat Chaudhuri, Kousha Etessami, Sudipto Guha, Mihalis Yannakakis:
Compression of Partially Ordered Strings. CONCUR 2003: 42-56 - [c81]Rajeev Alur, Salvatore La Torre, P. Madhusudan:
Playing Games with Boxes and Diamonds. CONCUR 2003: 127-141 - [c80]Rajeev Alur, Thao Dang, Franjo Ivancic:
Progress on Reachability Analysis of Hybrid Systems Using Predicate Abstraction. HSCC 2003: 4-19 - [c79]Rajeev Alur, Franjo Ivancic, Jesung Kim, Insup Lee, Oleg Sokolsky:
Generating embedded software from hierarchical hybrid models. LCTES 2003: 171-182 - [c78]Rajeev Alur, Thao Dang, Franjo Ivancic:
Counter-Example Guided Predicate Abstraction of Hybrid Systems. TACAS 2003: 208-223 - [c77]Rajeev Alur, Salvatore La Torre, P. Madhusudan:
Modular Strategies for Recursive Game Graphs. TACAS 2003: 363-378 - [c76]P. Madhusudan, Wonhong Nam, Rajeev Alur:
Symbolic computational techniques for solving games. BMC@CAV 2003: 578-592 - [e3]Rajeev Alur, Insup Lee:
Embedded Software, Third International Conference, EMSOFT 2003, Philadelphia, PA, USA, October 13-15, 2003, Proceedings. Lecture Notes in Computer Science 2855, Springer 2003, ISBN 3-540-20223-4 [contents] - 2002
- [j31]Rajeev Alur, Calin Belta, Vijay Kumar, Max Mintz, George J. Pappas, Harvey Rubin, Jonathan Schug:
Modeling and analyzing biomolecular networks. Comput. Sci. Eng. 4(1): 20-31 (2002) - [j30]Rafael Fierro, Aveek K. Das, John R. Spletzer, Joel M. Esposito, Vijay Kumar, James P. Ostrowski, George J. Pappas, Camillo J. Taylor, Yerang Hur, Rajeev Alur, Insup Lee, Gregory Z. Grudic, Ben Southall:
A Framework and Architecture for Multi-Robot Coordination. Int. J. Robotics Res. 21(10-11): 977-998 (2002) - [j29]Rajeev Alur, Thomas A. Henzinger, Orna Kupferman:
Alternating-time temporal logic. J. ACM 49(5): 672-713 (2002) - [c75]Alwyn Goodloe, Michael McDougall, Carl A. Gunter, Rajeev Alur:
Predictable programs in barcodes. CASES 2002: 298-303 - [c74]Rajeev Alur, Michael McDougall, Zijiang Yang:
Exploiting Behavioral Hierarchy for Efficient Model Checking. CAV 2002: 338-342 - [c73]Rajeev Alur, Calin Belta, Franjo Ivancic, Vijay Kumar, Harvey Rubin, Jonathan Schug, Oleg Sokolsky, Jonathan Webb:
Visual Programming for Modeling and Simulation of Biomolecular Regulatory Networks. HiPC 2002: 702-712 - [c72]Rajeev Alur, Thao Dang, Franjo Ivancic:
Reachability Analysis of Hybrid Systems via Predicate Abstraction. HSCC 2002: 35-48 - 2001
- [j28]Rajeev Alur, Robert K. Brayton, Thomas A. Henzinger, Shaz Qadeer, Sriram K. Rajamani:
Partial-Order Reduction in Symbolic State-Space Exploration. Formal Methods Syst. Des. 18(2): 97-116 (2001) - [j27]Rajeev Alur, Thomas A. Henzinger:
Introduction. Inf. Comput. 164(2): 233 (2001) - [j26]Rajeev Alur, Kousha Etessami, Salvatore La Torre, Doron A. Peled:
Parametric temporal logic for "model measuring". ACM Trans. Comput. Log. 2(3): 388-407 (2001) - [j25]Rajeev Alur, Mihalis Yannakakis:
Model checking of hierarchical state machines. ACM Trans. Program. Lang. Syst. 23(3): 273-303 (2001) - [c71]Rajeev Alur, Bow-Yaw Wang:
Verifying Network Protocol Implementations by Symbolic Refinement Checking. CAV 2001: 169-181 - [c70]Rajeev Alur, Kousha Etessami, Mihalis Yannakakis:
Analysis of Recursive State Machines. CAV 2001: 207-220 - [c69]M. Oliver Möller, Rajeev Alur:
Heuristics for Hierarchical Partitioning with Application to Model Checking. CHARME 2001: 71-85 - [c68]Rajeev Alur, Thao Dang, Joel M. Esposito, Rafael Fierro, Yerang Hur, Franjo Ivancic, Vijay Kumar, Insup Lee, Pradyumna Mishra, George J. Pappas, Oleg Sokolsky:
Hierarchical Hybrid Modeling of Embedded Systems. EMSOFT 2001: 14-31 - [c67]Rajeev Alur, Calin Belta, Franjo Ivancic:
Hybrid Modeling and Simulation of Biomolecular Networks. HSCC 2001: 19-32 - [c66]Rajeev Alur, Radu Grosu, Insup Lee, Oleg Sokolsky:
Compositional Refinement for Hierarchical Hybrid Systems. HSCC 2001: 33-48 - [c65]Rajeev Alur, Salvatore La Torre, George J. Pappas:
Optimal Paths in Weighted Timed Automata. HSCC 2001: 49-62 - [c64]Rajeev Alur, Kousha Etessami, Mihalis Yannakakis:
Realizability and Verification of MSC Graphs. ICALP 2001: 797-808 - [c63]Rajeev Alur, Luca de Alfaro, Radu Grosu, Thomas A. Henzinger, M. Kang, Christoph M. Kirsch, Rupak Majumdar, Freddy Y. C. Mang, Bow-Yaw Wang:
JMOCHA: A Model Checking Tool that Exploits Design Structure. ICSE 2001: 835-836 - [c62]Rajeev Alur, Radu Grosu:
Shared Variables Interaction Diagrams. ASE 2001: 281-288 - [c61]Rajeev Alur, Salvatore La Torre:
Deterministic Generators and Games for LTL Fragments. LICS 2001: 291-300 - 2000
- [j24]Rajeev Alur, Kenneth L. McMillan, Doron A. Peled:
Model-Checking of Correctness Conditions for Concurrent Objects. Inf. Comput. 160(1-2): 167-188 (2000) - [j23]Rajeev Alur, Thomas A. Henzinger, Gerardo Lafferriere, George J. Pappas:
Discrete abstractions of hybrid systems. Proc. IEEE 88(7): 971-984 (2000) - [j22]Rajeev Alur:
Computer-aided verification of reactive systems. ACM SIGSOFT Softw. Eng. Notes 25(1): 32-33 (2000) - [c60]Rajeev Alur, Radu Grosu, Michael McDougall:
Efficient Reachability Analysis of Hierarchical Reactive Machines. CAV 2000: 280-295 - [c59]Rajeev Alur:
Exploiting Hierarchical Structure for Efficient Formal Verification. CONCUR 2000: 66-68 - [c58]Rajeev Alur, Radu Grosu, Bow-Yaw Wang:
Automated Refinement Checking for Asynchronous Processes. FMCAD 2000: 55-72 - [c57]Rajeev Alur, Radu Grosu, Yerang Hur, Vijay Kumar, Insup Lee:
Modular Specification of Hybrid Systems in CHARON. HSCC 2000: 6-19 - [c56]Rajeev Alur, Kousha Etessami, Mihalis Yannakakis:
Inference of message sequence charts. ICSE 2000: 304-313 - [c55]Rajeev Alur, Aveek K. Das, Joel M. Esposito, Rafael Fierro, Gregory Z. Grudic, Yerang Hur, Vijay Kumar, Insup Lee, J. P. Lee, James P. Ostrowski, George J. Pappas, Ben Southall, John R. Spletzer, Camillo J. Taylor:
A Framework and Architecture for Multirobot Coordination. ISER 2000: 303-312 - [c54]Rajeev Alur, Radu Grosu:
Modular Refinement of Hierarchic Reactive Machines. POPL 2000: 390-402
1990 – 1999
- 1999
- [j21]Rajeev Alur, Thomas A. Henzinger:
Introduction. Formal Methods Syst. Des. 14(3): 235 (1999) - [j20]Rajeev Alur, Thomas A. Henzinger:
Introduction. Formal Methods Syst. Des. 15(1): 5 (1999) - [j19]Rajeev Alur, Thomas A. Henzinger:
Reactive Modules. Formal Methods Syst. Des. 15(1): 7-48 (1999) - [j18]Rajeev Alur, Doron A. Peled:
Undecidability of Partial Order Logics. Inf. Process. Lett. 69(3): 137-143 (1999) - [j17]Rajeev Alur, Limor Fix, Thomas A. Henzinger:
Event-Clock Automata: A Determinizable Class of Timed Automata. Theor. Comput. Sci. 211(1-2): 253-273 (1999) - [c53]Rajeev Alur:
Timed Automata. CAV 1999: 8-22 - [c52]Rajeev Alur, Luca de Alfaro, Thomas A. Henzinger, Freddy Y. C. Mang:
Automating Modular Verification. CONCUR 1999: 82-97 - [c51]Rajeev Alur, Bow-Yaw Wang:
"Next" Heuristic for On-the-Fly Model Checking. CONCUR 1999: 98-113 - [c50]Rajeev Alur, Mihalis Yannakakis:
Model Checking of Message Sequence Charts. CONCUR 1999: 114-129 - [c49]Rajeev Alur, Joel M. Esposito, Moonjoo Kim, Vijay Kumar, Insup Lee:
Formal Modeling and Analysis of Hybrid Systems: A Case Study in Multi-robot Coordination. World Congress on Formal Methods 1999: 212-232 - [c48]Rajeev Alur, Sampath Kannan, Salvatore La Torre:
Polyhedral Flows in Hybrid Automata. HSCC 1999: 5-18 - [c47]Rajeev Alur, Kousha Etessami, Salvatore La Torre, Doron A. Peled:
Parametric Temporal Logic for "Model Measuring". ICALP 1999: 159-168 - [c46]Rajeev Alur, Sampath Kannan, Mihalis Yannakakis:
Communicating Hierarchical State Machines. ICALP 1999: 169-178 - 1998
- [j16]Rajeev Alur, Thomas A. Henzinger:
Finitary Fairness. ACM Trans. Program. Lang. Syst. 20(6): 1171-1194 (1998) - [c45]Rajeev Alur, Thomas A. Henzinger, Freddy Y. C. Mang, Shaz Qadeer, Sriram K. Rajamani, Serdar Tasiran:
MOCHA: Modularity in Model Checking. CAV 1998: 521-525 - [c44]Rajeev Alur, Thomas A. Henzinger, Orna Kupferman, Moshe Y. Vardi:
Alternating Refinement Relations. CONCUR 1998: 163-178 - [c43]Allen D. Malony, Rajeev Alur:
Performance Evaluation and Prediction. Euro-Par 1998: 191-192 - [c42]Rajeev Alur:
Efficient Formal Verification of Hierarchical Descriptions. FSTTCS 1998: 269 - [c41]Rajeev Alur, Kenneth L. McMillan, Doron A. Peled:
Deciding Global Partial-Order Properties. ICALP 1998: 41-52 - [c40]Rajeev Alur, Robert P. Kurshan, Mahesh Viswanathan:
Membership Questions for Timed and Hybrid Automata. RTSS 1998: 254-263 - [c39]Rajeev Alur, Mihalis Yannakakis:
Model Checking of Hierarchical State Machines. SIGSOFT FSE 1998: 175-188 - [c38]Rajeev Alur, Thomas A. Henzinger, Sriram K. Rajamani:
Symbolic Exploration of transition Hierarchies. TACAS 1998: 330-344 - 1997
- [j15]Rajeev Alur, Costas Courcoubetis, Thomas A. Henzinger:
Computing Accumulated Delays in Real-time Systems. Formal Methods Syst. Des. 11(2): 137-155 (1997) - [j14]Rajeev Alur, Hagit Attiya, Gadi Taubenfeld:
Time-Adaptive Algorithms for Synchronization. SIAM J. Comput. 26(2): 539-556 (1997) - [j13]Rajeev Alur, Thomas A. Henzinger:
Real-Time System = Discrete System + Clock Variables. Int. J. Softw. Tools Technol. Transf. 1(1-2): 86-109 (1997) - [c37]Rajeev Alur, Robert K. Brayton, Thomas A. Henzinger, Shaz Qadeer, Sriram K. Rajamani:
Partial-Order Reduction in Symbolic State Space Exploration. CAV 1997: 340-351 - [c36]Rajeev Alur, Thomas A. Henzinger, Orna Kupferman:
Alternating-Time Temporal Logic. COMPOS 1997: 23-60 - [c35]Rajeev Alur, Thomas A. Henzinger:
Modularity for Timed and Hybrid Systems. CONCUR 1997: 74-88 - [c34]Rajeev Alur, Thomas A. Henzinger, Orna Kupferman:
Alternating-time Temporal Logic. FOCS 1997: 100-109 - [c33]Rajeev Alur, Lalita Jategaonkar Jagadeesan, Joseph J. Kott, James Von Olnhausen:
Model-Checking of Real-Time Systems: A Telecommunications Application (Experience Report). ICSE 1997: 514-524 - 1996
- [j12]Rajeev Alur:
Next Steps in Formal Verification. ACM Comput. Surv. 28(4es): 115 (1996) - [j11]Rajeev Alur, Gadi Taubenfeld:
Fast Timing-Based Algorithms. Distributed Comput. 10(1): 1-10 (1996) - [j10]Rajeev Alur, Gadi Taubenfeld:
Contention-Free Complexity of Shared Memory Algorithms. Inf. Comput. 126(1): 62-73 (1996) - [j9]Rajeev Alur, Tomás Feder, Thomas A. Henzinger:
The Benefits of Relaxing Punctuality. J. ACM 43(1): 116-146 (1996) - [j8]Rajeev Alur, Gerard J. Holzmann, Doron A. Peled:
An Analyzer for Message Sequence Charts. Softw. Concepts Tools 17(2): 70-77 (1996) - [j7]Rajeev Alur, Thomas A. Henzinger, Pei-Hsin Ho:
Automatic Symbolic Verification of Embedded Systems. IEEE Trans. Software Eng. 22(3): 181-201 (1996) - [c32]Serdar Tasiran, Rajeev Alur, Robert P. Kurshan, Robert K. Brayton:
Verifying Abstractions of Timed Systems. CONCUR 1996: 546-562 - [c31]Rajeev Alur, Thomas A. Henzinger:
Reactive Modules. LICS 1996: 207-218 - [c30]Rajeev Alur, Kenneth L. McMillan, Doron A. Peled:
Model-Checking of Correctness Conditions for Concurrent Objects. LICS 1996: 219-228 - [c29]Rajeev Alur, Gerard J. Holzmann, Doron A. Peled:
An Analyser for Mesage Sequence Charts. TACAS 1996: 35-48 - [e2]Rajeev Alur, Thomas A. Henzinger:
Computer Aided Verification, 8th International Conference, CAV '96, New Brunswick, NJ, USA, July 31 - August 3, 1996, Proceedings. Lecture Notes in Computer Science 1102, Springer 1996, ISBN 3-540-61474-5 [contents] - [e1]Rajeev Alur, Thomas A. Henzinger, Eduardo D. Sontag:
Hybrid Systems III: Verification and Control, Proceedings of the DIMACS/SYCON Workshop on Verification and Control of Hybrid Systems, October 22-25, 1995, Ruttgers University, New Brunswick, NJ, USA. Lecture Notes in Computer Science 1066, Springer 1996, ISBN 3-540-61155-X [contents] - 1995
- [j6]Rajeev Alur, Alon Itai, Robert P. Kurshan, Mihalis Yannakakis:
Timing Verification by Successive Approximation. Inf. Comput. 118(1): 142-157 (1995) - [j5]Rajeev Alur, Costas Courcoubetis, Nicolas Halbwachs, Thomas A. Henzinger, Pei-Hsin Ho, Xavier Nicollin, Alfredo Olivero, Joseph Sifakis, Sergio Yovine:
The Algorithmic Analysis of Hybrid Systems. Theor. Comput. Sci. 138(1): 3-34 (1995) - [c28]Rajeev Alur, Thomas A. Henzinger:
Local Liveness for Compositional Modeling of Fair Reactive Systems. CAV 1995: 166-179 - [c27]Rajeev Alur, Robert P. Kurshan:
Timing Analysis in COSPAN. Hybrid Systems 1995: 220-231 - [c26]Rajeev Alur, Doron A. Peled, Wojciech Penczek:
Model-Checking of Causality Properties. LICS 1995: 90-100 - [c25]Rajeev Alur, Costas Courcoubetis, Mihalis Yannakakis:
Distinguishing tests for nondeterministic and probabilistic machines. STOC 1995: 363-372 - 1994
- [j4]Rajeev Alur, Thomas A. Henzinger:
A Really Temporal Logic. J. ACM 41(1): 181-204 (1994) - [j3]Rajeev Alur, David L. Dill:
A Theory of Timed Automata. Theor. Comput. Sci. 126(2): 183-235 (1994) - [c24]Rajeev Alur, Limor Fix, Thomas A. Henzinger:
A Determinizable Class of Timed Automata. CAV 1994: 1-13 - [c23]Rajeev Alur, Costas Courcoubetis, Thomas A. Henzinger:
The Observational Power of Clocks. CONCUR 1994: 162-177 - [c22]Rajeev Alur, Thomas A. Henzinger:
Finitary Fairness. LICS 1994: 52-61 - [c21]Rajeev Alur, Gadi Taubenfeld:
Contention-free Complexity of Shared Memory Algorithms. PODC 1994: 61-70 - [c20]Rajeev Alur, Hagit Attiya, Gadi Taubenfeld:
Time-adaptive algorithms for synchronization. STOC 1994: 800-809 - 1993
- [j2]Rajeev Alur, Costas Courcoubetis, David L. Dill:
Model-Checking in Dense Real-time. Inf. Comput. 104(1): 2-34 (1993) - [j1]Rajeev Alur, Thomas A. Henzinger:
Real-Time Logics: Complexity and Expressiveness. Inf. Comput. 104(1): 35-77 (1993) - [c19]Rajeev Alur, Costas Courcoubetis, Thomas A. Henzinger:
Computing Accumulated Delays in Real-time Systems. CAV 1993: 181-193 - [c18]Rajeev Alur, Thomas A. Henzinger, Pei-Hsin Ho:
Automatic Symbolic Verification of Embedded Systems. RTSS 1993: 2-11 - [c17]Rajeev Alur, Gadi Taubenfeld:
How to Share an Object: A Fast Timing-Based Solution. SPDP 1993: 470-477 - [c16]Rajeev Alur, Thomas A. Henzinger, Moshe Y. Vardi:
Parametric real-time reasoning. STOC 1993: 592-601 - 1992
- [c15]Rajeev Alur, Alon Itai, Robert P. Kurshan, Mihalis Yannakakis:
Timing Verification by Successive Approximation. CAV 1992: 137-150 - [c14]Rajeev Alur, Costas Courcoubetis, Nicolas Halbwachs, David L. Dill, Howard Wong-Toi:
Minimization of Timed Transition Systems. CONCUR 1992: 340-354 - [c13]Rajeev Alur, Thomas A. Henzinger:
Back to the Future: Towards a Theory of Timed Regular Languages. FOCS 1992: 177-186 - [c12]Rajeev Alur, Costas Courcoubetis, Thomas A. Henzinger, Pei-Hsin Ho:
Hybrid Automata: An Algorithmic Approach to the Specification and Verification of Hybrid Systems. Hybrid Systems 1992: 209-229 - [c11]Rajeev Alur, Gadi Taubenfeld:
Results about Fast Mutual Exclusion. RTSS 1992: 12-21 - [c10]Rajeev Alur, Costas Courcoubetis, David L. Dill, Nicolas Halbwachs, Howard Wong-Toi:
An implementation of three algorithms for timing verification based on automata emptiness. RTSS 1992: 157-166 - 1991
- [b1]Rajeev Alur:
Techniques for automatic verification of real-time systems. Stanford University, USA, 1991 - [c9]Rajeev Alur, Costas Courcoubetis, David L. Dill:
Model-Checking for Probabilistic Real-Time Systems (Extended Abstract). ICALP 1991: 115-126 - [c8]Rajeev Alur, Tomás Feder, Thomas A. Henzinger:
The Benefits of Relaxing Punctuality. PODC 1991: 139-152 - [c7]Rajeev Alur, Costas Courcoubetis, David L. Dill:
Verifying Automata Specifications of Probabilistic Real-time Systems. REX Workshop 1991: 28-44 - [c6]Rajeev Alur, David L. Dill:
The Theory of Timed Automata. REX Workshop 1991: 45-73 - [c5]Rajeev Alur, Thomas A. Henzinger:
Logics and Models of Real Time: A Survey. REX Workshop 1991: 74-106 - 1990
- [c4]Rajeev Alur, David L. Dill:
Automata For Modeling Real-Time Systems. ICALP 1990: 322-335 - [c3]Rajeev Alur, Thomas A. Henzinger:
Real-time Logics: Complexity and Expressiveness. LICS 1990: 390-401 - [c2]Rajeev Alur, Costas Courcoubetis, David L. Dill:
Model-Checking for Real-Time Systems. LICS 1990: 414-425
1980 – 1989
- 1989
- [c1]Rajeev Alur, Thomas A. Henzinger:
A Really Temporal Logic. FOCS 1989: 164-169
Coauthor Index
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