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ORCID23rd IEEE Symposium on Computer Arithmetic 2016: Silicon Valley, CA, USA
- Paolo Montuschi, Michael J. Schulte, Javier Hormigo, Stuart F. Oberman, Nathalie Revol:
23nd IEEE Symposium on Computer Arithmetic, ARITH 2016, Silicon Valley, CA, USA, July 10-13, 2016. IEEE Computer Society 2016, ISBN 978-1-5090-1616-7
Session 1: Arithmetic Units
- H. Fatih Ugurdag, Anil Bayram, Vecdi Emre Levent
, Sezer Gören:
Efficient Combinational Circuits for Division by Small Integer Constants. 1-7 - Ghassem Jaberipur, Behrooz Parhami, Dariush Abedi:
A Formulation of Fast Carry Chains Suitable for Efficient Implementation with Majority Elements. 8-15
Session 2: Security and Cryptography (I)
- Jean-Claude Bajard, Julien Eynard, Nabil Merkiche:
Multi-fault Attack Detection for RNS Cryptographic Architecture. 16-23 - Amir Ali Kouzeh Geran, Arash Reyhani-Masoleh:
A CRC-Based Concurrent Fault Detection Architecture for Galois/Counter Mode (GCM). 24-31
Session 3: Big Numbers
- Shay Gueron, Vlad Krasnov:
Accelerating Big Integer Arithmetic Using Intel IFMA Extensions. 32-38 - Jean-Michel Muller, Valentina Popescu, Ping Tak Peter Tang:
A New Multiplication Algorithm for Extended Precision Using Floating-Point Expansions. 39-46 - Niall Emmart, Justin Luitjens, Charles C. Weems, Cliff Woolley:
Optimizing Modular Multiplication for NVIDIA's Maxwell GPUs. 47-54
Session 4: Accuracy and Reproducibility
- Christophe Denis, Pablo de Oliveira Castro, Eric Petit:
Verificarlo: Checking Floating Point Accuracy through Monte Carlo Arithmetic. 55-62 - Philippe Langlois, Rafife Nheili, Christophe Denis:
Recovering Numerical Reproducibility in Hydrodynamic Simulations. 63-70 - Vincent Lefèvre:
Correctly Rounded Arbitrary-Precision Floating-Point Summation. 71-78
Session 5: Floating-Point Implementations
- Julio Villalba-Moreno:
Digit Recurrence Floating-Point Division under HUB Format. 79-86 - Cédric Lichtenau, Steven R. Carlough, Silvia Melitta Müller:
Quad Precision Floating Point on the IBM z13. 87-94
Session 6: Less-conventional Number Systems (I)
- Michael Schaffner, Michael Gautschi, Frank K. Gürkaynak, Luca Benini:
Accuracy and Performance Trade-Offs of Logarithmic Number Units in Multi-Core Clusters. 95-103 - Syed Ershad Ahmed, Sanket Kadam, M. B. Srinivas:
An Iterative Logarithmic Multiplier with Improved Precision. 104-111
Session 7: Security and Cryptography (II)
- Shay Gueron, Sanu Mathew:
Hardware Implementation of AES Using Area-Optimal Polynomials for Composite-Field Representation GF(2^4)^2 of GF(2^8). 112-117 - Nicolas Méloni, M. Anwar Hasan:
Random Digit Representation of Integers. 118-125 - Karim Bigou, Arnaud Tisserand:
Hybrid Position-Residues Number System. 126-133
Session 8: Less-conventional Number Systems (II)
- Marta Brzicova, Christiane Frougny, Edita Pelantová, Milena Svobodová:
On-line Multiplication and Division in Real and Complex Bases. 134-141 - Joris van der Hoeven, Grégoire Lecerf:
Evaluating Straight-Line Programs over Balls. 142-149 - Xiao-Ping Cui, Weiqiang Liu, Dong Wenwen, Fabrizio Lombardi:
A Parallel Decimal Multiplier Using Hybrid Binary Coded Decimal (BCD) Codes. 150-155
Session 9: Logarithm Implementations
- Julien Le Maire, Nicolas Brunie, Florent de Dinechin, Jean-Michel Muller:
Computing floating-point logarithms with fixed-point operations. 156-163 - Martin Langhammer, Bogdan Pasca:
Single Precision Natural Logarithm Architecture for Hard Floating-Point and DSP-Enabled FPGAs. 164-171 - Guillaume Revy:
Automated Design of Floating-Point Logarithm Functions on Integer Processors. 172-180
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