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2020 – today
- 2021
[j5]Axel Klawonn
, Martin Lanser, Oliver Rheinbach, Gerhard Wellein, Markus Wittmann:
Energy efficiency of nonlinear domain decomposition methods. Int. J. High Perform. Comput. Appl. 35(3) (2021)- 2020
- [p2]Axel Klawonn, Martin Lanser, Matthias Uran, Oliver Rheinbach, Stephan Köhler, Jörg Schröder, Lisa Scheunemann, Dominik Brands, Daniel Balzani, Ashutosh Gandhi, Gerhard Wellein, Markus Wittmann, Olaf Schenk, Radim Janalík:
EXASTEEL: Towards a Virtual Laboratory for the Multiscale Simulation of Dual-Phase Steel Using High-Performance Computing. Software for Exascale Computing 2020: 351-404
2010 – 2019
- 2018
- [c7]Markus Wittmann, Georg Hager, Radim Janalík, Martin Lanser, Axel Klawonn, Oliver Rheinbach, Olaf Schenk, Gerhard Wellein:
Multicore Performance Engineering of Sparse Triangular Solves Using a Modified Roofline Model. SBAC-PAD 2018: 233-241 - 2017
- [i13]Markus Wittmann, Viktor Haag, Thomas Zeiser, Harald Köstler, Gerhard Wellein:
Lattice Boltzmann Benchmark Kernels as a Testbed for Performance Analysis. CoRR abs/1711.11468 (2017) - 2016
- [b1]Markus Wittmann:
Hardware-effiziente, hochparallele Implementierungen von Lattice-Boltzmann-Verfahren für komplexe Geometrien. University of Erlangen-Nuremberg, Germany, 2016 - [j4]Markus Wittmann, Georg Hager, Thomas Zeiser, Jan Treibig, Gerhard Wellein:
Chip-level and multi-node analysis of energy-optimized lattice Boltzmann CFD simulations. Concurr. Comput. Pract. Exp. 28(7): 2295-2315 (2016) - [p1]Simon Bauer, Hans-Peter Bunge, Daniel Drzisga, Björn Gmeiner, Markus Huber, Lorenz John, Marcus Mohr, Ulrich Rüde, Holger Stengel, Christian Waluga, Jens Weismüller, Gerhard Wellein, Markus Wittmann, Barbara I. Wohlmuth:
Hybrid Parallel Multigrid Methods for Geodynamical Simulations. Software for Exascale Computing 2016: 211-235 - [i12]Simon Bauer, Marcus Mohr, Ulrich Rüde, Jens Weismüller, Markus Wittmann, Barbara I. Wohlmuth:
A two-scale approach for efficient on-the-fly operator assembly in massively parallel high performance multigrid codes. CoRR abs/1608.06473 (2016) - [i11]Nicolay Hammer, Ferdinand Jamitzky, Helmut Satzger, Momme Allalen, Alexander Block, Anupam Karmakar, Matthias Brehm, Reinhold Bader, Luigi Iapichino, Antonio Ragagnin, Vasilios Karakasis, Dieter Kranzlmüller, Arndt Bode, Herbert Huber, Martin Kühn, Rui Machado, Daniel Grünewald, Philipp V. F. Edelmann, Friedrich K. Röpke, Markus Wittmann, Thomas Zeiser, Gerhard Wellein, Gerald Mathias, Magnus Schwörer, Konstantin Lorenzen, Christoph Federrath, Ralf Klessen, Karl-Ulrich Bamberg, Hartmut Ruhl, Florian Schornbaum, Martin Bauer, Anand Nikhil, Jiaxing Qi, Harald Klimach, Hinnerk Stüben, Abhishek Deshmukh, Tobias Falkenstein, Klaus Dolag, Margarita Petkova:
Extreme Scale-out SuperMUC Phase 2 - lessons learned. CoRR abs/1609.01507 (2016) - 2015
- [c6]Nicolay Hammer, Ferdinand Jamitzky, Helmut Satzger, Momme Allalen, Alexander Block, Anupam Karmakar, Matthias Brehm, Reinhold Bader, Luigi Iapichino, Antonio Ragagnin, Vasilios Karakasis, Dieter Kranzlmüller, Arndt Bode, Herbert Huber, Martin Kühn, Rui Machado, Daniel Grünewald, Philipp V. F. Edelmann, Friedrich K. Röpke, Markus Wittmann, Thomas Zeiser, Gerhard Wellein, Gerald Mathias, Magnus Schwörer, Konstantin Lorenzen, Christoph Federrath, Ralf Klessen, Karl-Ulrich Bamberg, Hartmut Ruhl, Florian Schornbaum, Martin Bauer, Anand Nikhil, Jiaxing Qi, Harald Klimach, Hinnerk Stüben, Abhishek Deshmukh, Tobias Falkenstein, Klaus Dolag, Margarita Petkova:
Extreme Scale-out SuperMUC Phase 2 - lessons learned. PARCO 2015: 827-836 - [i10]Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein:
Short Note on Costs of Floating Point Operations on current x86-64 Architectures: Denormals, Overflow, Underflow, and Division by Zero. CoRR abs/1506.03997 (2015) - 2014
- [c5]Kai Selgrad, Alexander Lier, Markus Wittmann, Daniel Lohmann, Marc Stamminger:
Defmacro for C: Lightweight, Ad Hoc Code Generation. ELS 2014: 80-87 - [i9]Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein:
Modeling and analyzing performance for highly optimized propagation steps of the lattice Boltzmann method on sparse lattices. CoRR abs/1410.0412 (2014) - 2013
- [j3]Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein:
Comparison of different propagation steps for lattice Boltzmann methods. Comput. Math. Appl. 65(6): 924-935 (2013) - [j2]Faisal Shahzad, Markus Wittmann, Moritz Kreutzer, Thomas Zeiser, Georg Hager, Gerhard Wellein:
A Survey of Checkpoint/Restart Techniques on Distributed Memory Systems. Parallel Process. Lett. 23(4) (2013) - [c4]Faisal Shahzad, Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein:
An Evaluation of Different I/O Techniques for Checkpoint/Restart. IPDPS Workshops 2013: 1708-1716 - [i8]Markus Wittmann, Georg Hager, Thomas Zeiser, Gerhard Wellein:
Asynchronous MPI for the Masses. CoRR abs/1302.4280 (2013) - [i7]Markus Wittmann, Georg Hager, Thomas Zeiser, Gerhard Wellein:
An analysis of energy-optimized lattice-Boltzmann CFD simulations from the chip to the highly parallel level. CoRR abs/1304.7664 (2013) - 2012
- [c3]Faisal Shahzad, Markus Wittmann, Thomas Zeiser, Gerhard Wellein:
Asynchronous Checkpointing by Dedicated Checkpoint Threads. EuroMPI 2012: 289-290 - 2011
- [i6]Markus Wittmann, Georg Hager:
Optimizing ccNUMA locality for task-parallel execution under OpenMP and TBB on multicore-based systems. CoRR abs/1101.0093 (2011) - [i5]Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein:
Comparison of different Propagation Steps for the Lattice Boltzmann Method. CoRR abs/1111.0922 (2011) - [i4]Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein:
Domain decomposition and locality optimization for large-scale lattice Boltzmann simulations. CoRR abs/1111.1129 (2011) - 2010
- [j1]Markus Wittmann, Georg Hager, Jan Treibig, Gerhard Wellein:
Leveraging Shared Caches for Parallel Temporal Blocking of Stencil Codes on Multicore Processors and Clusters. Parallel Process. Lett. 20(4): 359-376 (2010) - [c2]Markus Wittmann, Georg Hager, Gerhard Wellein:
Multicore-aware parallel temporal blocking of stencil codes for shared and distributed memory. IPDPS Workshops 2010: 1-7 - [i3]Markus Wittmann, Georg Hager, Jan Treibig, Gerhard Wellein:
Leveraging shared caches for parallel temporal blocking of stencil codes on multicore processors and clusters. CoRR abs/1006.3148 (2010)
2000 – 2009
- 2009
- [c1]Gerhard Wellein, Georg Hager, Thomas Zeiser, Markus Wittmann, Holger Fehske:
Efficient Temporal Blocking for Stencil Computations by Multicore-Aware Wavefront Parallelization. COMPSAC (1) 2009: 579-586 - [i2]Markus Wittmann, Georg Hager:
A Proof of Concept for Optimizing Task Parallelism by Locality Queues. CoRR abs/0902.1884 (2009) - [i1]Markus Wittmann, Georg Hager, Gerhard Wellein:
Multicore-aware parallel temporal blocking of stencil codes for shared and distributed memory. CoRR abs/0912.4506 (2009)
Coauthor Index
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