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ORCIDWolfgang Raab
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2010 – 2019
- 2011
[c11]Ulrich Ramacher, Wolfgang Raab, J. A. Ulrich Hachmann, Dominik Langen, Jörg Berthold, R. Kramer, A. Schackow, Cyprian Grassmann, Mirko Sauermann, P. Szreder, F. Capar, G. Obradovic, W. Xu, Nico Brüls, Kang Lee, Eugene Weber, Ray Kuhn, John Harrington:
Architecture and implementation of a Software-Defined Radio baseband processor. ISCAS 2011: 2193-2196- 2010
- [c10]Wolfgang Raab, Jörg Berthold, J. A. Ulrich Hachmann, Dominik Langen, Michael Schreiner, Holger Eisenreich, Jens-Uwe Schluessler, Georg Ellguth:
Low power design of the X-GOLD® SDR 20 baseband processor. DATE 2010: 792-793 - [c9]Matthias May, Thomas Ilnseher, Norbert Wehn
, Wolfgang Raab:
A 150Mbit/s 3GPP LTE Turbo code decoder. DATE 2010: 1420-1425
2000 – 2009
- 2005
- [c8]Axel Techmer, Hans-Martin Blüthgen, Cyprian Grassmann, J. A. Ulrich Hachmann, Wolfgang Raab, Ulrich Ramacher:
Embedded vision platform for video surveillance systems. Electronic Imaging: Image and Video Communications and Processing 2005 - [c7]Hans-Martin Blüthgen, Christian Sauer, Dominik Langen, Matthias Gries, Wolfgang Raab:
Application-Driven Design of Cost-Efficient Communications Platforms. GI Jahrestagung (1) 2005: 314-318 - 2004
- [c6]Wolfgang Raab, Hans-Martin Blüthgen, Ulrich Ramacher:
A low-power memory hierarchy for a fully programmable baseband processor. WMPI 2004: 102-106 - 2003
- [j3]Wolfgang Raab, Nico Brüls, J. A. Ulrich Hachmann, Jens Harnisch, Ulrich Ramacher, Christian Sauer, Axel Techmer:
A 100-GOPS Programmable Processor for Vehicle Vision Systems. IEEE Des. Test Comput. 20(1): 8-16 (2003) - [j2]Ulrich Ramacher, Nico Brüls, J. A. Ulrich Hachmann, Jens Harnisch, Wolfgang Raab, Axel Techmer:
100 GOPS vision processor for automotive applications. SIGARCH Comput. Archit. News 31(1): 60-68 (2003) - [c5]Hans-Martin Blüthgen, Cyprian Grassmann, Wolfgang Raab, Ulrich Ramacher:
A programmable platform for software-defined radio. SoC 2003 - 2002
- [c4]Ilia Oussorov, Wolfgang Raab, J. A. Ulrich Hachmann, Alex Kravtsov:
Integration of Instruction Set Simulators into SystemC High Level Models. DSD 2002: 126-131
1990 – 1999
- 1999
- [c3]Ulrich Ramacher, Wolfgang Raab, Wolfgang Kabatzke:
Prototyp eines Bildrechners für Echtzeitbildverarbeitung in Industrie- und Medientechnik. PEARL 1999: 102-110 - 1995
- [c2]Ulrich Ramacher, Wolfgang Raab, J. A. Ulrich Hachmann, Jörg Beichter, Nico Brüls, Matthias Wesseling, Elisabeth Sicheneder, Joachim Gläß, Andreas Wurz, Reinhard Männer:
SYNAPSE-1: a high-speed general purpose parallel neurocomputer system. IPPS 1995: 774-781 - 1993
- [j1]Ulrich Ramacher, Wolfgang Raab, Joachim K. Anlauf, J. A. Ulrich Hachmann, Jörg Beichter, Nico Brüls, Matthias Wesseling, Elisabeth Sicheneder, Reinhard Männer, Joachim Gläß, Andreas Wurz:
Multiprocessor And Memory Architecture Of The Neurocomputer Synapse-1. Int. J. Neural Syst. 4(4): 333-336 (1993) - 1990
- [c1]Ulrich Ramacher, Wolfgang Raab:
Fine-grain system architectures for systolic emulation of neural algorithms. ASAP 1990: 554-566
Coauthor Index
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