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Mohammad Haji Seyed Javadi
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2020 – today
- 2023
- [j5]Mohammad Haji Seyed Javadi, Mohsen Faryabi, Hamid Reza Mahdiani:
A Comprehensive Model for Efficient Design Space Exploration of Imprecise Computational Blocks. ACM Trans. Embed. Comput. Syst. 22(6): 103:1-103:20 (2023) - 2020
- [j4]Mohammad Haji Seyed Javadi, Mohammad Hossein Yalame, Hamid Reza Mahdiani:
Small Constant Mean-Error Imprecise Adder/Multiplier for Efficient VLSI Implementation of MAC-Based Applications. IEEE Trans. Computers 69(9): 1376-1387 (2020)
2010 – 2019
- 2017
- [j3]Hamid Reza Mahdiani, Mohammad Haji Seyed Javadi, Sied Mehdi Fakhraie:
Efficient utilization of imprecise computational blocks for hardware implementation of imprecision tolerant applications. Microelectron. J. 61: 57-66 (2017) - 2015
- [c3]Mohammad Haji Seyed Javadi, Hamid Reza Mahdiani:
Efficient Utilization of Imprecise Blocks for Hardware Implementation of a Gaussian Filter. ISVLSI 2015: 33-37 - 2013
- [j2]Hamid Reza Mahdiani, Abbas Banaiyan, Mohammad Haji Seyed Javadi, Sied Mehdi Fakhraie, Caro Lucas:
Defuzzification block: New algorithms, and efficient hardware and software implementation issues. Eng. Appl. Artif. Intell. 26(1): 162-172 (2013) - [j1]Mohammad Haji Seyed Javadi, Hamid Reza Mahdiani, Esmaeil Zeinali Khosraghi:
A hardware oriented fuzzification algorithm and its VLSI implementation. Soft Comput. 17(4): 683-690 (2013) - 2011
- [c2]Mehdi Alipour, Mohammad Haji Seyed Javadi, Ali Jahanian:
Congestion and track usage improvement of large FPGAs using metro-on-FPGA methodology. ACM Great Lakes Symposium on VLSI 2011: 49-54
2000 – 2009
- 2007
- [c1]Mohammad Haji Seyed Javadi, Hamed Rafi, Shaghayegh Tabatabaei, Abolfazl Toroghi Haghighat:
An Area-Efficient Hardware Implementation for Real-Time Window-Based Image Filtering. SITIS 2007: 515-519
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