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ORCIDSrivatsa Rangachar Srinivasa
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2020 – today
- 2023
[j7]Gauthaman Murali
, Aditya Iyer, Lingjun Zhu, Jianming Tong, Francisco Muñoz-Martínez, Srivatsa Rangachar Srinivasa, Tanay Karnik, Tushar Krishna, Sung Kyu Lim:
On Continuing DNN Accelerator Architecture Scaling Using Tightly Coupled Compute-on-Memory 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 31(10): 1603-1613 (2023)- 2022
- [c12]Srivatsa Rangachar Srinivasa, Jainaveen Sundaram Priya, Dileep Kurian, Erika Ramirez Lozano, Satish Yada, Saransh Chhabra, Kamakhya Prasad Sahu, Paolo A. Aseron, Ronald Kalim, Anuradha Srinivasan, Tanay Karnik:
Design Methodology for Scalable 2.5D/3D Heterogenous Tiled Chiplet Systems. ISQED 2022: 1-4 - 2021
- [c11]Jainaveen Sundaram, Srivatsa Rangachar Srinivasa, Dileep Kurian, Indranil Chakraborty, Sirisha Rani Kale, Nilesh Jain, Tanay Karnik, Ravi R. Iyer, Anuradha Srinivasan:
A 93 TOPS/Watt Near-Memory Reconfigurable SAD Accelerator for HEVC/AV1/JEM Encoding. DATE 2021: 1400-1403 - [c10]Helena Caminal, Kailin Yang, Srivatsa Srinivasa, Akshay Krishna Ramanathan, Khalid Al-Hawaj, Tianshu Wu, Vijaykrishnan Narayanan, Christopher Batten, José F. Martínez:
CAPE: A Content-Addressable Processing Engine. HPCA 2021: 557-569 - [c9]Srivatsa Srinivasa, Akshay Krishna Ramanathan, Jainaveen Sundaram, Dileep Kurian, Srinivasan Gopal, Nilesh Jain, Anuradha Srinivasan, Ravi R. Iyer, Vijaykrishnan Narayanan, Tanay Karnik:
Trends and Opportunities for SRAM Based In-Memory and Near-Memory Computation. ISQED 2021: 547-552 - [i1]Shamiul Alam, Md. Shafayat Hossain, Srivatsa Rangachar Srinivasa, Ahmedullah Aziz:
Cryogenic Memory Technologies. CoRR abs/2111.09436 (2021) - 2020
- [c8]Akshay Krishna Ramanathan, Gurpreet S. Kalsi, Srivatsa Srinivasa, Tarun Makesh Chandran, Kamlesh R. Pillai, Om Ji Omer, Vijaykrishnan Narayanan, Sreenivas Subramoney:
Look-Up Table based Energy Efficient Processing in Cache Support for Neural Network Acceleration. MICRO 2020: 88-101
2010 – 2019
- 2019
- [j6]Suman Datta, Sourav Dutta, Benjamin Grisafe, Jeff Smith, Srivatsa Srinivasa, Huacheng Ye:
Back-End-of-Line Compatible Transistors for Monolithic 3-D Integration. IEEE Micro 39(6): 8-15 (2019) - [j5]Zhixiao Zhang, Xin Si, Srivatsa Srinivasa, Akshay Krishna Ramanathan, Meng-Fan Chang:
Recent Advances in Compute-in-Memory Support for SRAM Using Monolithic 3-D Integration. IEEE Micro 39(6): 28-37 (2019) - [j4]Srivatsa Rangachar Srinivasa, Akshay Krishna Ramanathan, Xueqing Li, Wei-Hao Chen, Sumeet Kumar Gupta, Meng-Fan Chang, Swaroop Ghosh, Jack Sampson, Vijaykrishnan Narayanan:
ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(7): 2533-2545 (2019) - [c7]Srivatsa Rangachar Srinivasa, Wei-Hao Chen, Yung-Ning Tu, Meng-Fan Chang, Jack Sampson, Vijaykrishnan Narayanan:
Monolithic-3D Integration Augmented Design Techniques for Computing in SRAMs. ISCAS 2019: 1-5 - 2018
- [j3]Srivatsa Rangachar Srinivasa, Xueqing Li, Meng-Fan Chang, John Sampson, Sumeet Kumar Gupta, Vijaykrishnan Narayanan:
Compact 3-D-SRAM Memory With Concurrent Row and Column Data Access Capability Using Sequential Monolithic 3-D Integration. IEEE Trans. Very Large Scale Integr. Syst. 26(4): 671-683 (2018) - [j2]Sumitha George, Xueqing Li, Minli Julie Liao, Kaisheng Ma, Srivatsa Rangachar Srinivasa, Karthik Mohan, Ahmedullah Aziz, John Sampson, Sumeet Kumar Gupta, Vijaykrishnan Narayanan:
Symmetric 2-D-Memory Access to Multidimensional Data. IEEE Trans. Very Large Scale Integr. Syst. 26(6): 1040-1050 (2018) - [c6]Shubham Rai, Srivatsa Rangachar Srinivasa, Patsy Cadareanu, Xunzhao Yin, Xiaobo Sharon Hu, Pierre-Emmanuel Gaillardon, Vijaykrishnan Narayanan, Akash Kumar:
Emerging reconfigurable nanotechnologies: can they support future electronics? ICCAD 2018: 13 - [c5]Srivatsa Rangachar Srinivasa, Akshay Krishna Ramanathan, Xueqing Li, Wei-Hao Chen, Fu-Kuo Hsueh, Chih-Chao Yang, Chang-Hong Shen, Jia-Min Shieh, Sumeet Kumar Gupta, Meng-Fan Marvin Chang, Swaroop Ghosh, Jack Sampson, Vijaykrishnan Narayanan:
A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support. ISLPED 2018: 34:1-34:6 - [c4]Jinhang Choi, Srivatsa Rangachar Srinivasa, Yasuki Tanabe, Jack Sampson, Vijaykrishnan Narayanan:
A Power-Efficient Hybrid Architecture Design for Image Recognition Using CNNs. ISVLSI 2018: 22-27 - [c3]Nicholas Jao, Akshay Krishna Ramanathan, Srivatsa Rangachar Srinivasa, Sumitha George, John Sampson, Vijaykrishnan Narayanan:
Harnessing Emerging Technology for Compute-in-Memory Support. ISVLSI 2018: 447-452 - 2017
- [c2]Kaisheng Ma, Xueqing Li, Srivatsa Rangachar Srinivasa, Yongpan Liu, John Sampson, Yuan Xie, Vijaykrishnan Narayanan:
Spendthrift: Machine learning based resource and frequency scaling for ambient energy harvesting nonvolatile processors. ASP-DAC 2017: 678-683 - [c1]Srivatsa Rangachar Srinivasa, Karthik Mohan, Wei-Hao Chen, Kuo-Hsinag Hsu, Xueqing Li, Meng-Fan Chang, Sumeet Kumar Gupta, John Sampson, Vijaykrishnan Narayanan:
Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via. ISVLSI 2017: 128-133
2000 – 2009
- 2009
- [j1]Muniandi Kannan, Srivatsa Srinivasa:
Hardware implementation low power high speed FFT core. Int. Arab J. Inf. Technol. 6(1): 1-6 (2009)
Coauthor Index
aka: Vijaykrishnan Narayanan
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