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2020 – today
- 2022
[c7]Kyoka Nakano, Hiroki Wada, Yoshiyuki Yokoyama, Takeshi Hayakawa:
Lift-off Process of On-chip Micro-Gel Actuator for Cell Manipulations. MHS 2022: 1- 2020
- [j4]Hiroki Wada
, Yuha Koike, Yoshiyuki Yokoyama, Takeshi Hayakawa:
Evaluation of the Response Characteristics of On-Chip Gel Actuators for Various Single Cell Manipulations. IEEE Robotics Autom. Lett. 5(4): 5205-5212 (2020) - [i1]Yushi Mura, Hiroki Wada:
Quantization of Blackjack: Quantum Basic Strategy and Advantage. CoRR abs/2011.12342 (2020)
2010 – 2019
- 2010
- [j3]Hiroki Wada, Hidetoshi Oya, Kojiro Hagino, Yasumitsu Ebinuma:
Observer-Based Robust Stabilizing Controllers Based on the Trajectory for Polytopic Uncertain Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(6): 1260-1265 (2010)
2000 – 2009
- 2007
- [j2]Hao San, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Akira Hayakawa, Haruo Kobayashi, Tatsuji Matsuura, Kouichi Yahagi, Junya Kudoh, Hideo Nakane, Masao Hotta, Toshiro Tsukada, Koichiro Mashiko, Atsushi Wada:
A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm. IEICE Trans. Electron. 90-C(6): 1181-1188 (2007) - [c6]Hao San, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Akira Hayakawa, Haruo Kobayashi, Masao Hotta:
A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS. ASP-DAC 2007: 96-97 - 2006
- [j1]Hao San, Akira Hayakawa, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Kazuyuki Kobayashi, Haruo Kobayashi, Tatsuji Matsuura, Kouichi Yahagi, Junya Kudoh, Hideo Nakane, Masao Hotta, Toshiro Tsukada, Koichiro Mashiko, Atsushi Wada:
Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(4): 908-915 (2006) - 2001
- [c5]Satoshi Ohtake, Shintaro Nagai, Hiroki Wada, Hideo Fujiwara:
A DFT method for RTL circuits to achieve complete fault efficiency based on fixed-control testability. ASP-DAC 2001: 331-334 - [c4]Ken-ichi Yamaguchi, Hiroki Wada, Toshimitsu Masuzawa, Hideo Fujiwara:
BIST Method Based on Concurrent Single-Control Testability of RTL Data Paths. Asian Test Symposium 2001: 313-318 - 2000
- [c3]Satoshi Ohtake, Hiroki Wada, Toshimitsu Masuzawa, Hideo Fujiwara:
A non-scan DFT method at register-transfer level to achieve complete fault efficiency. ASP-DAC 2000: 599-604 - [c2]Toshimitsu Masuzawa, Minoru Izutsu, Hiroki Wada, Hideo Fujiwara:
Single-control testability of RTL data paths for BIST. Asian Test Symposium 2000: 210-215 - [c1]Hiroki Wada, Toshimitsu Masuzawa, Kewal K. Saluja, Hideo Fujiwara:
Design for Strong Testability of RTL Data Paths to Provide Complete Fault Efficiency. VLSI Design 2000: 300-305
Coauthor Index
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