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Bruce F. Cockburn
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- affiliation: University of Alberta, Edmonton, Canada
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2020 – today
- 2024
- [j45]Zijing Niu, Tingting Zhang, Honglan Jiang, Bruce F. Cockburn, Leibo Liu, Jie Han:
Hardware-Efficient Logarithmic Floating-Point Multipliers for Error-Tolerant Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 71(1): 209-222 (2024) - 2022
- [j44]Mohammad Saeed Ansari, Bruce F. Cockburn, Jie Han:
Low-Power Approximate Logarithmic Squaring Circuit Design for DSP Applications. IEEE Trans. Emerg. Top. Comput. 10(1): 500-506 (2022) - 2021
- [j43]Mohammad Saeed Ansari, Shyama Gandhi, Bruce F. Cockburn, Jie Han:
Fast and low-power leading-one detectors for energy-efficient logarithmic computing. IET Comput. Digit. Tech. 15(4): 241-250 (2021) - [j42]Mohammad Saeed Ansari, Bruce F. Cockburn, Jie Han:
An Improved Logarithmic Multiplier for Energy-Efficient Neural Computing. IEEE Trans. Computers 70(4): 614-625 (2021) - [c51]Zijing Niu, Honglan Jiang, Mohammad Saeed Ansari, Bruce F. Cockburn, Leibo Liu, Jie Han:
A Logarithmic Floating-Point Multiplier for the Efficient Training of Neural Networks. ACM Great Lakes Symposium on VLSI 2021: 65-70 - 2020
- [j41]Morgan Ledwon, Bruce F. Cockburn, Jie Han:
High-Throughput FPGA-Based Hardware Accelerators for Deflate Compression and Decompression Using High-Level Synthesis. IEEE Access 8: 62207-62217 (2020) - [j40]Mohammad Saeed Ansari, Vojtech Mrazek, Bruce F. Cockburn, Lukás Sekanina, Zdenek Vasícek, Jie Han:
Improving the Accuracy and Hardware Efficiency of Neural Networks Using Approximate Multipliers. IEEE Trans. Very Large Scale Integr. Syst. 28(2): 317-328 (2020)
2010 – 2019
- 2019
- [c50]Shyama Gandhi, Mohammad Saeed Ansari, Bruce F. Cockburn, Jie Han:
Approximate Leading One Detector Design for a Hardware-Efficient Mitchell Multiplier. CCECE 2019: 1-4 - [c49]Morgan Ledwon, Bruce F. Cockburn, Jie Han:
Design and Evaluation of an FPGA-based Hardware Accelerator for Deflate Data Decompression. CCECE 2019: 1-6 - [c48]Mohammad Saeed Ansari, Bruce F. Cockburn, Jie Han:
A Hardware-Efficient Logarithmic Multiplier with Improved Accuracy. DATE 2019: 928-931 - [c47]Honglan Jiang, Francisco J. H. Santiago, Mohammad Saeed Ansari, Leibo Liu, Bruce F. Cockburn, Fabrizio Lombardi, Jie Han:
Characterizing Approximate Adders and Multipliers Optimized under Different Design Constraints. ACM Great Lakes Symposium on VLSI 2019: 393-398 - 2018
- [j39]Mohammad Saeed Ansari, Honglan Jiang, Bruce F. Cockburn, Jie Han:
Low-Power Approximate Multipliers Using Encoded Partial Products and Approximate Compressors. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(3): 404-416 (2018) - [j38]Michael Shoniker, Oleg Oleynikov, Bruce F. Cockburn, Jie Han, Manish Rana, Witold Pedrycz:
Automatic Selection of Process Corner Simulations for Faster Design Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(6): 1312-1316 (2018) - [j37]Yan Li, Yufeng Li, Jie Han, Jianhao Hu, Fan Yang, Xuan Zeng, Bruce F. Cockburn, Jie Chen:
Feedback-Based Low-Power Soft-Error-Tolerant Design for Dual-Modular Redundancy. IEEE Trans. Very Large Scale Integr. Syst. 26(8): 1585-1589 (2018) - 2017
- [j36]Andrew J. Maier, Bruce F. Cockburn:
Optimization of Low-Density Parity Check decoder performance for OpenCL designs synthesized to FPGAs. J. Parallel Distributed Comput. 107: 134-145 (2017) - [c46]Yuanzhuo Qu, Jie Han, Bruce F. Cockburn, Witold Pedrycz, Yue Zhang, Weisheng Zhao:
A true random number generator based on parallel STT-MTJs. DATE 2017: 606-609 - 2016
- [j35]Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott:
Design, evaluation and fault-tolerance analysis of stochastic FIR filters. Microelectron. Reliab. 57: 111-127 (2016) - [j34]Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott:
Stochastic Circuit Design and Performance Evaluation of Vector Quantization for Different Error Measures. IEEE Trans. Very Large Scale Integr. Syst. 24(10): 3169-3183 (2016) - [c45]Mohammad Saeed Ansari, Ali Mahani, Jie Han, Bruce F. Cockburn:
A novel gate grading approach for soft error tolerance in combinational circuits. CCECE 2016: 1-4 - [c44]Bruce F. Cockburn, Andrew J. Maier:
Implementation of decoders for symmetric low density parity check codes on parallel computation platforms using OpenCL. CCECE 2016: 1-6 - [c43]Manish Rana, Ramon Canal, Jie Han, Bruce F. Cockburn:
SRAM memory margin probability failure estimation using Gaussian Process regression. ICCD 2016: 448-451 - 2015
- [c42]Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott:
Stochastic circuit design and performance evaluation of vector quantization. ASAP 2015: 111-115 - [c41]Michael Shoniker, Bruce F. Cockburn, Jie Han, Witold Pedrycz:
Minimizing the number of process corner simulations during design verification. DATE 2015: 289-292 - [c40]Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott:
Design and evaluation of stochastic FIR filters. PACRIM 2015: 407-412 - 2014
- [j33]Navid Rezaei, Deyasini Majumdar, Bruce F. Cockburn, Christian Schlegel:
Electromagnetic Energy and Data Transfer for a Neural Implant. J. Ubiquitous Syst. Pervasive Networks 5(1): 9-16 (2014) - [c39]Deyasini Majumdar, Christian Schlegel, Navid Rezaei, Bruce F. Cockburn:
Designing Next-generation Implantable Wireless Telemetry. BIODEVICES 2014: 271-277 - [c38]Russell Dodd, Bruce F. Cockburn, Vincent C. Gaudet:
Adaptive dual-threshold neural signal compression suitable for implantable recording. ICASSP 2014: 8346-8350 - [c37]Russell Dodd, Bruce F. Cockburn, Vincent C. Gaudet:
Neural Spike Compression Using Feature Extraction and a Fuzzy C-Means Codebook. ISMVL 2014: 44-48 - 2013
- [c36]Navid Rezaei, Deyasini Majumdar, Bruce F. Cockburn, Christian Schlegel:
Electromagnetic Energy and Data Transfer in Biological Tissues Using Loop Antennas. ANT/SEIT 2013: 908-913 - 2012
- [j32]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn:
Accurate simulation of non-isotropic fading channels with arbitrary temporal correlation. IET Commun. 6(5): 557-564 (2012) - [j31]Amirhossein Alimohammad, Santosh V. Nagaraj, Saeed Fouladi Fard, Bruce F. Cockburn:
Layered space-time multiple-input multiple-output detector with parameterisable performance. IET Commun. 6(17): 3053-3058 (2012) - [j30]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn:
Hardware Implementation of Nakagami and Weibull Variate Generators. IEEE Trans. Very Large Scale Integr. Syst. 20(7): 1276-1284 (2012) - [j29]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn:
Reconfigurable performance measurement system-on-a-chip for baseband wireless algorithm design and verification. IEEE Wirel. Commun. 19(6): 84-91 (2012) - [c35]Malihe Ahmadi, Bruce F. Cockburn, Christian Schlegel:
Low power asynchronous packet-based baseband transceiver for wireless sensor networks. MWSCAS 2012: 940-943 - 2011
- [j28]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn:
Accurate multiple-input multiple-output fading channel simulator using a compact and highthroughput reconfigurable architecture. IET Commun. 5(6): 844-852 (2011) - [j27]Saeed Fouladi Fard, Amirhossein Alimohammad, Bruce F. Cockburn:
Single-field programmable gate array simulator for geometric multiple-input multiple-output fading channel models. IET Commun. 5(9): 1246-1254 (2011) - [j26]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn:
Hardware Implementation of Rayleigh and Ricean Variate Generators. IEEE Trans. Very Large Scale Integr. Syst. 19(8): 1495-1499 (2011) - [j25]John C. Koob, Sue Ann Ung, Bruce F. Cockburn, Duncan G. Elliott:
Design and Characterization of a Multilevel DRAM. IEEE Trans. Very Large Scale Integr. Syst. 19(9): 1583-1596 (2011) - 2010
- [j24]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn:
A Unified Architecture for the Accurate and High-Throughput Implementation of Six Key Elementary Functions. IEEE Trans. Computers 59(4): 449-456 (2010) - [j23]Zhengang Chen, Tyler L. Brandon, Duncan G. Elliott, Stephen Bates, Witold A. Krzymien, Bruce F. Cockburn:
Jointly Designed Architecture-Aware LDPC Convolutional Codes and High-Throughput Parallel Encoders/Decoders. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(4): 836-849 (2010) - [j22]Saeed Fouladi Fard, Amirhossein Alimohammad, Bruce F. Cockburn:
An FPGA-Based Simulator for High Path Count Rayleigh and Rician Fading. IEEE Trans. Veh. Technol. 59(6): 2725-2734 (2010) - [c34]Arsene Pankeu Yomi, Bruce F. Cockburn:
Near-optimal and efficient MIMO detectors for 64-QAM symbols. CCECE 2010: 1-6
2000 – 2009
- 2009
- [j21]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel:
Compact Rayleigh and Rician fading simulator based on random walk processes. IET Commun. 3(8): 1333-1342 (2009) - [j20]Tyler L. Brandon, John C. Koob, Leendert van den Berg, Zhengang Chen, Amirhossein Alimohammad, Ramkrishna Swamy, Jason Klaus, Stephen Bates, Vincent C. Gaudet, Bruce F. Cockburn, Duncan G. Elliott:
A Compact 1.1-Gb/s Encoder and a Memory-Based 600-Mb/s Decoder for LDPC Convolutional Codes. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(5): 1017-1029 (2009) - [c33]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn:
FPGA-based accelerator for the verification of leading-edge wireless systems. DAC 2009: 844-847 - [c32]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn:
A flexible layered architecture for accurate digital baseband algorithm development and verification. DATE 2009: 45-50 - [c31]Saeed Fouladi Fard, Amirhossein Alimohammad, Bruce F. Cockburn, Christian Schlegel:
A Single FPGA Filter-Based Multipath Fading Emulator. GLOBECOM 2009: 1-5 - [c30]Saeed Fouladi Fard, Amirhossein Alimohammad, Bruce F. Cockburn, Christian Schlegel:
A versatile fading simulator for on-chip verification of MIMO communication systems. SoCC 2009: 271-274 - [c29]Saeed Fouladi Fard, Amirhossein Alimohammad, Bruce F. Cockburn, Christian Schlegel:
High path-count multirate Rayleigh fading channel simulator with time-multiplexed datapath. SoCC 2009: 412-415 - 2008
- [j19]Tyler L. Brandon, Robert Hang, Gary Block, Vincent C. Gaudet, Bruce F. Cockburn, Sheryl L. Howard, Christian Giasson, Keith Boyle, Paul Goud, Siavash Sheikh Zeinoddin, Anthony Rapley, Stephen Bates, Duncan G. Elliott, Christian Schlegel:
A scalable LDPC decoder ASIC architecture with bit-serial message exchange. Integr. 41(3): 385-398 (2008) - [j18]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel:
A Compact Single-FPGA Fading-Channel Simulator. IEEE Trans. Circuits Syst. II Express Briefs 55-II(1): 84-88 (2008) - [j17]Zhengang Chen, Tyler L. Brandon, Stephen Bates, Duncan G. Elliott, Bruce F. Cockburn:
Efficient Implementation of Low-Density Parity-Check Convolutional Code Encoders With Built-In Termination. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(11): 3628-3640 (2008) - [j16]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel:
A Compact and Accurate Gaussian Variate Generator. IEEE Trans. Very Large Scale Integr. Syst. 16(5): 517-527 (2008) - [j15]Amirhossein Alimohammad, Bruce F. Cockburn:
Modeling and Hardware Implementation Aspects of Fading Channel Simulators. IEEE Trans. Veh. Technol. 57(4): 2055-2069 (2008) - [c28]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel:
A Novel Technique for Efficient Hardware Simulation of Spatiotemporally Correlated MIMO Fading Channels. ICC 2008: 718-724 - [c27]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel:
On the efficiency and accuracy of hybrid pseudo-random number generators for FPGA-based simulations. IPDPS 2008: 1-8 - [c26]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel:
A single-FPGA multipath MIMO fading channel simulator. ISCAS 2008: 308-311 - [c25]Tyler L. Brandon, John C. Koob, Leendert van den Berg, Zhengang Chen, Amirhossein Alimohammad, Ramkrishna Swamy, Jason Klaus, Stephen Bates, Vincent C. Gaudet, Bruce F. Cockburn, Duncan G. Elliott:
A 600-Mb/s encoder and decoder for low-density parity-check convolutional codes. ISCAS 2008: 3090-3093 - [c24]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn:
Hardware-based Error Rate Testing of Digital Baseband Communication Systems. ITC 2008: 1-10 - [c23]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel:
An Accurate and Compact Rayleigh and Rician Fading Channel Simulator. VTC Spring 2008: 409-413 - 2007
- [j14]Yufei Yuan, Bruce F. Cockburn, Thomas Sikora, Mrinal K. Mandal:
Efficient allocation of packet-level forward error correction in video streaming over the Internet. J. Electronic Imaging 16(2): 023012 (2007) - [j13]Ramkrishna Swamy, Stephen Bates, Tyler L. Brandon, Bruce F. Cockburn, Duncan G. Elliott, John C. Koob, Zhengang Chen:
Design and Test of a 175-Mb/s, Rate-1/2 (128, 3, 6) Low-Density Parity-Check Convolutional Code Encoder and Decoder. IEEE J. Solid State Circuits 42(10): 2245-2256 (2007) - [c22]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel:
A Compact Fading Channel Simulator Using Timing-Driven Resource Sharing. ASAP 2007: 154-159 - [c21]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel:
A Flexible Filter Processor for Fading Channel Simulation. FCCM 2007: 339-342 - [c20]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel:
Compound Uniform Random Number Generators with On-Chhip Correlation and Distribution Measurements. FPT 2007: 377-380 - [c19]Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel:
An Improved SOS-Based Fading Channel Emulator. VTC Fall 2007: 931-935 - 2006
- [j12]Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn:
Using Stacked Bitlines and Hybrid ROM Cells to Form ROM and SRAM-ROM With Increased Storage Density. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(12): 2595-2605 (2006) - [j11]Amirhossein Alimohammad, Bruce F. Cockburn:
An Efficient Parallel Architecture for Implementing LST Decoding in MIMO Systems. IEEE Trans. Signal Process. 54(10): 3899-3907 (2006) - [c18]Bruce F. Cockburn, Keith Boyle:
Design and Characterization of a Digital Delay Locked Loop Synthesized from Black Box Standard Cells. CCECE 2006: 1214-1217 - [c17]Amirhossein Alimohammad, Bruce F. Cockburn:
A Reconfigurable SOS-based Rayleigh Fading Channel Simulator. SiPS 2006: 39-44 - [c16]Saeed Sharifi Tehrani, Bruce F. Cockburn, Stephen Bates:
On the Effects of Colored Noise on the Performance of LDPC Codes. SiPS 2006: 226-231 - 2005
- [j10]John C. Koob, Daniel A. Leder, Raymond J. Sung, Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn, Lisa G. McIlrath:
Design of a 3-D fully depleted SOI computational RAM. IEEE Trans. Very Large Scale Integr. Syst. 13(3): 358-369 (2005) - [c15]Kamlesh R. Raiter, Bruce F. Cockburn:
An investigation into three-level ferroelectric memory. MTDT 2005: 38-43 - [c14]John C. Koob, Sue Ann Ung, Ashwin S. Rao, Daniel A. Leder, Craig S. Joly, Kristopher C. Breen, Tyler L. Brandon, Michael Hume, Bruce F. Cockburn, Duncan G. Elliott:
Test and Characterization of a Variable-Capacity Multilevel DRAM. VTS 2005: 189-197 - 2004
- [j9]Hongyu Liao, Mrinal Kr. Mandal, Bruce F. Cockburn:
Efficient architectures for 1-D and 2-D lifting-based wavelet transforms. IEEE Trans. Signal Process. 52(5): 1315-1326 (2004) - [c13]Bruce F. Cockburn:
Tutorial on Magnetic Tunnel Junction Magnetoresistive Random-Access Memory. MTDT 2004: 46-51 - 2003
- [c12]Xiaoling Sun, Bruce F. Cockburn, Duncan G. Elliott:
An Efficient Functional Test for the Massively-Parallel C ?RAM Logic-Enhanced Memory Architecture. DFT 2003: 475- - [c11]Bruce F. Cockburn:
The Emergence of High-Density Semiconductor-Compatible Spintronic Memory. ICMENS 2003: 321-326 - [c10]Bruce F. Cockburn, Jesús Hernández Tapia, Duncan G. Elliott:
A Multilevel DRAM with Hierarchical Bitlines and Serial Sensing. MTDT 2003: 14-19 - [c9]Daniel Salamon, Bruce F. Cockburn:
An Electrical Simulation Model for the Chalcogenide Phase-Change Memory Cell. MTDT 2003: 86- - 2002
- [c8]Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott, Yunan Xiang, Sue Ann Ung:
Fault Modeling and Pattern-Sensitivity Testing for a Multilevel DRAM. MTDT 2002: 117-122 - [c7]Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott:
An Investigation into Crosstalk Noise in DRAM Structures. MTDT 2002: 123- - [c6]Bruce F. Cockburn:
Panel on Advanced Embedded Memory Technologies. MTDT 2002: 177-178 - 2001
- [c5]Raymond J. Sung, John C. Koob, Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn:
Design of an Embedded Fully-Depleted SOI SRAM. MTDT 2001: 13-
1990 – 1999
- 1999
- [j8]Bruce F. Cockburn, Fabrizio Lombardi, Fred J. Meyer:
Guest Editors' Introduction: DRAM Architecture and Testing. IEEE Des. Test Comput. 16(1): 19-21 (1999) - [j7]Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott:
Fault Models and Tests for a 2-Bit-per-Cell MLDRAM. IEEE Des. Test Comput. 16(1): 22-31 (1999) - [j6]Jeremy S. Sewall, Bruce F. Cockburn:
Voiceband signal classification using statistically optimal combinations of low-complexity discriminant variables. IEEE Trans. Commun. 47(11): 1623-1627 (1999) - [c4]C. Wickman, Duncan G. Elliott, Bruce F. Cockburn:
Cost Models for Large File Memory DRAMs with ECC and Bad Block Marking. DFT 1999: 319- - [c3]Gershom Birk, Duncan G. Elliott, Bruce F. Cockburn:
A Comparative Simulation Study of Four Multilevel DRAMs. MTDT 1999: 102-109 - 1998
- [c2]Bruce F. Cockburn, Albert L.-C. Kwong:
Transition Maximization Techniques for Enhancing the Two-Pattern Fault Coverage of Pseudorandom Test Pattern Generators. VTS 1998: 430-439 - 1995
- [c1]Bruce F. Cockburn, Y.-F. Nicole Sat:
Synthesized Transparent BIST for Detecting Scrambled Pattern-Sensitive Faults in RAMs. ITC 1995: 23-32 - 1994
- [j5]Bruce F. Cockburn:
Deterministic tests for detecting singleV-coupling faults in RAMs. J. Electron. Test. 5(1): 91-113 (1994) - [j4]Bruce F. Cockburn:
Tutorial on semiconductor memory testing. J. Electron. Test. 5(4): 321-336 (1994) - 1992
- [j3]Bruce F. Cockburn, Janusz A. Brzozowski:
Near-optimal tests for classes of write-triggered coupling faults in RAMs. J. Electron. Test. 3(3): 251-264 (1992) - 1990
- [j2]Janusz A. Brzozowski, Bruce F. Cockburn:
Detection of coupling faults in RAMs. J. Electron. Test. 1(2): 151-162 (1990) - [j1]Bruce F. Cockburn, Janusz A. Brzozowski:
Switch-level testability of the dynamic CMOS PLA. Integr. 9(1): 49-80 (1990)
Coauthor Index
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