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2020 – today
- 2024
[c19]Nishant Patil, Abdul R. Hossain, Sasank Garikapati, Harish Krishnaswamy, Aravind Nagulu:
A 3-to-13 GHz Quasi-Elliptic Higher-Order N-path Filter. MWSCAS 2024: 1248-1251- 2023
- [c18]Nishant Patil
, Sankaran Aniruddhan:
Area and Power Efficient Receiver for Narrowband Internet of Things Applications. SENSORS 2023: 1-4 - [c17]Yi He, Mike Hutton, Steven Chan, Robert De Gruijl, Rama Govindaraju, Nishant Patil, Yanjing Li:
Understanding and Mitigating Hardware Failures in Deep Learning Training Systems. ISCA 2023: 70:1-70:16 - [c16]Norman P. Jouppi, George Kurian, Sheng Li, Peter C. Ma, Rahul Nagarajan, Lifeng Nai, Nishant Patil, Suvinay Subramanian, Andy Swing, Brian Towles, Cliff Young, Xiang Zhou, Zongwei Zhou, David A. Patterson:
TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings. ISCA 2023: 82:1-82:14 - [i3]Norman P. Jouppi, George Kurian, Sheng Li, Peter C. Ma, Rahul Nagarajan, Lifeng Nai, Nishant Patil, Suvinay Subramanian, Andy Swing, Brian Towles, Cliff Young, Xiang Zhou, Zongwei Zhou, David A. Patterson:
TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings. CoRR abs/2304.01433 (2023) - 2021
- [j10]Thomas Norrie, Nishant Patil, Doe Hyun Yoon, George Kurian, Sheng Li, James Laudon, Cliff Young, Norman P. Jouppi, David A. Patterson:
The Design Process for Google's Training Chips: TPUv2 and TPUv3. IEEE Micro 41(2): 56-63 (2021) - [c15]Norman P. Jouppi, Doe Hyun Yoon, Matthew Ashcraft, Mark Gottscho, Thomas B. Jablin, George Kurian, James Laudon, Sheng Li, Peter C. Ma, Xiaoyu Ma, Thomas Norrie, Nishant Patil, Sushma Prasad, Cliff Young, Zongwei Zhou, David A. Patterson:
Ten Lessons From Three Generations Shaped Google's TPUv4i : Industrial Product. ISCA 2021: 1-14 - 2020
- [j9]Norman P. Jouppi, Doe Hyun Yoon, George Kurian, Sheng Li, Nishant Patil, James Laudon, Cliff Young, David A. Patterson:
A domain-specific supercomputer for training deep neural networks. Commun. ACM 63(7): 67-78 (2020) - [c14]Thomas Norrie, Nishant Patil, Doe Hyun Yoon, George Kurian, Sheng Li, James Laudon, Cliff Young, Norman P. Jouppi, David A. Patterson:
Google's Training Chips Revealed: TPUv2 and TPUv3. Hot Chips Symposium 2020: 1-70
2010 – 2019
- 2018
- [j8]Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson:
A domain-specific architecture for deep neural networks. Commun. ACM 61(9): 50-59 (2018) - [j7]Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson:
Motivation for and Evaluation of the First Tensor Processing Unit. IEEE Micro 38(3): 10-19 (2018) - 2017
- [c13]Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson, Gaurav Agrawal, Raminder Bajwa, Sarah Bates, Suresh Bhatia, Nan Boden, Al Borchers, Rick Boyle, Pierre-luc Cantin, Clifford Chao, Chris Clark, Jeremy Coriell, Mike Daley, Matt Dau, Jeffrey Dean, Ben Gelb, Tara Vazir Ghaemmaghami, Rajendra Gottipati, William Gulland, Robert Hagmann, C. Richard Ho, Doug Hogberg, John Hu, Robert Hundt, Dan Hurt, Julian Ibarz, Aaron Jaffey, Alek Jaworski, Alexander Kaplan, Harshit Khaitan, Daniel Killebrew, Andy Koch, Naveen Kumar, Steve Lacy, James Laudon, James Law, Diemthu Le, Chris Leary, Zhuyuan Liu, Kyle Lucke, Alan Lundin, Gordon MacKean, Adriana Maggiore, Maire Mahony, Kieran Miller, Rahul Nagarajan, Ravi Narayanaswami, Ray Ni, Kathy Nix, Thomas Norrie, Mark Omernick, Narayana Penukonda, Andy Phelps, Jonathan Ross, Matt Ross, Amir Salek, Emad Samadiani, Chris Severn, Gregory Sizikov, Matthew Snelham, Jed Souter, Dan Steinberg, Andy Swing, Mercedes Tan, Gregory Thorson, Bo Tian, Horia Toma, Erick Tuttle, Vijay Vasudevan, Richard Walter, Walter Wang, Eric Wilcox, Doe Hyun Yoon:
In-Datacenter Performance Analysis of a Tensor Processing Unit. ISCA 2017: 1-12 - [i2]Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson, Gaurav Agrawal, Raminder Bajwa, Sarah Bates, Suresh Bhatia, Nan Boden, Al Borchers, Rick Boyle, Pierre-luc Cantin, Clifford Chao, Chris Clark, Jeremy Coriell, Mike Daley, Matt Dau, Jeffrey Dean, Ben Gelb, Tara Vazir Ghaemmaghami, Rajendra Gottipati, William Gulland, Robert Hagmann, C. Richard Ho, Doug Hogberg, John Hu, Robert Hundt, Dan Hurt, Julian Ibarz, Aaron Jaffey, Alek Jaworski, Alexander Kaplan, Harshit Khaitan, Andy Koch, Naveen Kumar, Steve Lacy, James Laudon, James Law, Diemthu Le, Chris Leary, Zhuyuan Liu, Kyle Lucke, Alan Lundin, Gordon MacKean, Adriana Maggiore, Maire Mahony, Kieran Miller, Rahul Nagarajan, Ravi Narayanaswami, Ray Ni, Kathy Nix, Thomas Norrie, Mark Omernick, Narayana Penukonda, Andy Phelps, Jonathan Ross, Amir Salek, Emad Samadiani, Chris Severn, Gregory Sizikov, Matthew Snelham, Jed Souter, Dan Steinberg, Andy Swing, Mercedes Tan, Gregory Thorson, Bo Tian, Horia Toma, Erick Tuttle, Vijay Vasudevan, Richard Walter, Walter Wang, Eric Wilcox, Doe Hyun Yoon:
In-Datacenter Performance Analysis of a Tensor Processing Unit. CoRR abs/1704.04760 (2017) - 2016
- [i1]Yonghui Wu, Mike Schuster, Zhifeng Chen, Quoc V. Le, Mohammad Norouzi, Wolfgang Macherey, Maxim Krikun, Yuan Cao, Qin Gao, Klaus Macherey, Jeff Klingner, Apurva Shah, Melvin Johnson, Xiaobing Liu, Lukasz Kaiser, Stephan Gouws, Yoshikiyo Kato, Taku Kudo, Hideto Kazawa, Keith Stevens, George Kurian, Nishant Patil, Wei Wang, Cliff Young, Jason Smith, Jason Riesa, Alex Rudnick, Oriol Vinyals, Greg Corrado, Macduff Hughes, Jeffrey Dean:
Google's Neural Machine Translation System: Bridging the Gap between Human and Machine Translation. CoRR abs/1609.08144 (2016) - 2012
- [j6]Jie Zhang, Albert Lin, Nishant Patil, Hai Wei, Lan Wei, H.-S. Philip Wong, Subhasish Mitra:
Carbon Nanotube Robust Digital VLSI. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(4): 453-471 (2012) - 2011
- [j5]Subhasish Mitra, Hyungmin Cho, Ted Hong, Young Moon Kim, Hsiao-Heng Lee, Larkhoon Leem, Yanjing Li, David Lin, Evelyn Mintarno, Diana Mui, Sung-Boem Park, Nishant Patil, Hai Wei, Jie Zhang:
Robust System Design. IPSJ Trans. Syst. LSI Des. Methodol. 4: 2-30 (2011) - [j4]Jie Zhang, Nishant Patil, Arash Hazeghi, H.-S. Philip Wong, Subhasish Mitra:
Characterization and Design of Logic Circuits in the Presence of Carbon Nanotube Density Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(8): 1103-1113 (2011) - [c12]Hai Wei, Jie Zhang, Lan Wei, Nishant Patil, Albert Lin, Max M. Shulaker, Hong-Yu Chen, H.-S. Philip Wong, Subhasish Mitra:
Carbon nanotube imperfection-immune digital VLSI: Frequently asked questions updated. ICCAD 2011: 227-230 - 2010
- [c11]Jie Zhang, Shashikanth Bobba, Nishant Patil, Albert Lin, H.-S. Philip Wong, Giovanni De Micheli, Subhasish Mitra:
Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement. DAC 2010: 889-892 - [c10]Jie Zhang, Nishant Patil, Albert Lin, H.-S. Philip Wong, Subhasish Mitra:
Carbon nanotube circuits: Living with imperfections and variations. DATE 2010: 1159-1164 - [c9]Chen Chen, Roozbeh Parsa, Nishant Patil, Soogine Chong, Kerem Akarvardar, J. Provine, David Lewis, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Efficient FPGAs using nanoelectromechanical relays. FPGA 2010: 273-282
2000 – 2009
- 2009
- [j3]Jie Zhang, Nishant Patil, Subhasish Mitra:
Probabilistic Analysis and Design of Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(9): 1307-1320 (2009) - [c8]Jie Zhang, Nishant Patil, Arash Hazeghi, Subhasish Mitra:
Carbon nanotube circuits in the presence of carbon nanotube density variations. DAC 2009: 71-76 - [c7]Nishant Patil, Albert Lin, Jie Zhang, H.-S. Philip Wong, Subhasish Mitra:
Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions. DAC 2009: 304-309 - [c6]Subhasish Mitra, Jie Zhang, Nishant Patil, Hai Wei:
Imperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors. DATE 2009: 436-441 - [c5]Nishant Patil, Subhasish Mitra:
Imperfection-immune Carbon Nanotube digital VLSI. ICCD 2009: 1 - 2008
- [j2]Nishant Patil, Jie Deng, Albert Lin, H.-S. Philip Wong, Subhasish Mitra:
Design Methods for Misaligned and Mispositioned Carbon-Nanotube Immune Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(10): 1725-1736 (2008) - [c4]Jie Zhang, Nishant Patil, Subhasish Mitra:
Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits. DATE 2008: 1009-1014 - 2007
- [c3]Nishant Patil, Jie Deng, H.-S. Philip Wong, Subhasish Mitra:
Automated Design of Misaligned-Carbon-Nanotube-Immune Circuits. DAC 2007: 958-961 - [c2]Jie Deng, Nishant Patil, Koungmin Ryu, Alexander Badmaev, Chongwu Zhou, Subhasish Mitra, H.-S. Philip Wong:
Carbon Nanotube Transistor Circuits: Circuit-Level Performance Benchmarking and Design Options for Living with Imperfections. ISSCC 2007: 70-588 - 2006
- [c1]Nishant Patil, Subhasish Mitra, Steven S. Lumetta:
Signature Analyzer Design for Yield Learning Support. ITC 2006: 1-10 - 2005
- [j1]Subhasish Mitra, Steven S. Lumetta, Michael Mitzenmacher, Nishant Patil:
X-Tolerant Test Response Compaction. IEEE Des. Test Comput. 22(6): 566-574 (2005)
Coauthor Index
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