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2020 – today
- 2024
[j139]Mostafa Amer
, Ahmed Abuelnasr, Mohamed Ali, Ahmad Hassan, Aref Trigui, Ahmed Ragab, Mohamad Sawan, Yvon Savaria:
Enhanced Dynamic Regulation in Buck Converters: Integrating Input-Voltage Feedforward With Voltage-Mode Feedback. IEEE Access 12: 7310-7328 (2024)- [j138]Mahmoud Ahmed, Sebastien Genevey, Mohamed Ali, Yvon Savaria, Yves Audet:
Recent Start-Up Techniques Intended for TEG Energy Harvesting: A Review. IEEE Access 12: 34116-34130 (2024) - [j137]Maedeh Azodi, Sayed Alireza Sadrossadat, Yvon Savaria:
Nonlinear Circuit Macromodeling Using New Heterogeneous-Layered Deep Clockwork Recurrent Neural Network. IEEE Access 12: 89506-89519 (2024) - [j136]Mahmoud Ahmed, Aref Trigui, Sebastien Genevey, Yves Audet, Yvon Savaria:
A 32-mV Supply Ring Oscillator Composed of Modified Schmitt Trigger Delay Cells for Integrated Start-Up Circuits in DC Energy Harvesting Systems. IEEE Access 12: 129660-129672 (2024) - [j135]Aziz Oukaira, Dhaou Said, Touati Djallel eddine, Nader El-Zarif, Ahmad Hassan, Yvon Savaria, Ahmed Lakhssassi:
Novel Peak-Source-Scanning (NPSS) Model for Thermal Control of Systems-in-Package (SiP). IEEE Access 12: 143842-143853 (2024) - [j134]Ahmed Abuelnasr, Ahmed Ragab, Mostafa Amer, Benoit Gosselin, Yvon Savaria:
Incremental reinforcement learning for multi-objective analog circuit design acceleration. Eng. Appl. Artif. Intell. 129: 107426 (2024) - [j133]Parisa Mashreghi-Moghadam, Tarek Ould-Bachir, Yvon Savaria:
PrismParser: A Framework for Implementing Efficient P4-Programmable Packet Parsers on FPGA. Future Internet 16(9): 307 (2024) - [j132]Nader El-Zarif, Mostafa Amer, Mohamed Ali, Ahmad Hassan, Aziz Oukaira, Christian Jesús B. Fayomi, Yvon Savaria:
Calibration of Ring Oscillator-Based Integrated Temperature Sensors for Power Management Systems. Sensors 24(2): 440 (2024) - [j131]Alireza Ghaffari, Masoud Asgharian, Yvon Savaria:
Statistical Hardware Design With Multimodel Active Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(2): 562-572 (2024) - [j130]Hamidreza Mafi, Naim Ben-Hamida, Sadok Aouini, Yvon Savaria:
Digital Compensation of Timing Skew Mismatches in Time-Interleaved ADCs by Source Separation. IEEE Trans. Instrum. Meas. 73: 1-12 (2024) - [j129]Mostafa Elbediwy, Bill Pontikakis, Alireza Ghaffari, Jean-Pierre David, Yvon Savaria:
DR-PIFO: A Dynamic Ranking Packet Scheduler Using a Push-In-First-Out Queue. IEEE Trans. Netw. Serv. Manag. 21(1): 355-371 (2024) - [j128]Jonathan Kern, Sébastien Henwood, Gonçalo Mordido, Elsa Dupraz, Abdeldjalil Aïssa-El-Bey, Yvon Savaria, François Leduc-Primeau:
Fast and Accurate Output Error Estimation for Memristor-Based Deep Neural Networks. IEEE Trans. Signal Process. 72: 1205-1218 (2024) - [j127]Yajun Zeng, Jun Wang, Shaoming Wei, Jinping Sun, Peng Lei, Yvon Savaria, Chi Zhang:
Spatial Registration of Heterogeneous Sensors on Mobile Platforms. IEEE Trans. Signal Process. 72: 1839-1853 (2024) - [c293]Mostafa Abbasmollaei, Tarek Ould-Bachir, Yvon Savaria:
Normal and Resilient Mode FPGA-based Access Gateway Function Through P4-generated RTL. DRCN 2024: 32-38 - [c292]Hamidreza Mafi, Mohamed Amine Bensenouci, Sadok Aouini, Mohammad Honarparvar, Naim Ben-Hamida, Yvon Savaria:
Utilization of Noise-Shaping in Mixed-Signal Timing-Skew Mismatch Calibration of TI-ADCs. ISCAS 2024: 1-5 - [c291]Elisabeth Humblet, Théo Dupuis, Yoan Fournier, MohammadHossein AskariHemmat, François Leduc-Primeau, Jean-Pierre David, Yvon Savaria:
MSPARQ: A RISC-V Vector Processor Array Optimized for Low-Resolution Neural Networks. MWSCAS 2024: 464-468 - [c290]Florent Allard, Tarek Ould-Bachir, Yvon Savaria:
Enhancing P4 Syntax to Support Extended Finite State Machines as Native Stateful Objects. NetSoft 2024: 326-330 - [c289]Hamidreza Mafi, Naim Ben-Hamida, Sadok Aouini, Yvon Savaria:
Digital Compensation of Timing-Skew Mismatches in TI-ADCs by Modulation and Source Separation. NewCAS 2024: 104-108 - [c288]Yang Zhang, Yvon Savaria, Mohamad Sawan, François Leduc-Primeau:
$\mathcal{S}^{3}$1DCNN: A Compact Stacked Spectral-Spatial Attention 1DCNN for Seizure Prediction with Wearables. NewCAS 2024: 278-282 - [c287]Karim Kaced, Sebastien Genevey, Yvon Savaria, Jean-Pierre David:
A Flexible Thermal/Solar Energy Harvesting System with Hysteretic Control and Maximum Power Point Tracking Regulation for IoT Devices. NewCAS 2024: 323-327 - [c286]Fabien Portas, Guy Bois, Yvon Savaria:
CoChrono: A Unified Hardware/Software Performance Analysis Tool for SoC-FPGA Codesign. NewCAS 2024: 328-332 - [c285]Julien Posso, Guy Bois, Yvon Savaria:
Real-Time Spacecraft Pose Estimation Using Mixed-Precision Quantized Neural Network on COTS Reconfigurable MPSoC. NewCAS 2024: 358-362 - [i20]MohammadHossein AskariHemmat, Ahmadreza Jeddi, Reyhane Askari Hemmat, Ivan Lazarevich, Alexander Hoffman, Sudhakar Sah, Ehsan Saboori, Yvon Savaria, Jean-Pierre David:
QGen: On the Ability to Generalize in Quantization Aware Training. CoRR abs/2404.11769 (2024) - [i19]Julien Posso, Guy Bois, Yvon Savaria:
Real-Time Spacecraft Pose Estimation Using Mixed-Precision Quantized Neural Network on COTS Reconfigurable MPSoC. CoRR abs/2407.06170 (2024) - 2023
- [j126]Mostafa Elbediwy, Bill Pontikakis, Jean-Pierre David, Yvon Savaria:
A Hardware Architecture of a Dynamic Ranking Packet Scheduler for Programmable Network Devices. IEEE Access 11: 61422-61436 (2023) - [j125]Hossein Mahvash Mohammadi, Mohammad Hadi Edrisi, Yvon Savaria:
Enhanced Artificial Vision for Visually Impaired Using Visual Implants. IEEE Access 11: 80020-80029 (2023) - [j124]Thomas Luinaud, J. M. Pierre Langlois, Yvon Savaria:
Symbolic Analysis for Data Plane Programs Specialization. ACM Trans. Archit. Code Optim. 20(1): 1:1-1:21 (2023) - [j123]Ahmed Abuelnasr, Mostafa Amer, Mohamed Ali, Ahmad Hassan, Benoit Gosselin, Ahmed Ragab, Yvon Savaria:
Delay Mismatch Insensitive Dead Time Generator for High-Voltage Switched-Mode Power Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 70(4): 1555-1565 (2023) - [j122]Hachem Bensalem, Yves Blaquière, Yvon Savaria:
An Efficient OpenCL-Based Implementation of a SHA-3 Co-Processor on an FPGA-Centric Platform. IEEE Trans. Circuits Syst. II Express Briefs 70(3): 1144-1148 (2023) - [c284]Mohammadhossein Askarihemmat, Sean Wagner, Olexa Bilaniuk, Yassine Hariri, Yvon Savaria, Jean-Pierre David:
BARVINN: Arbitrary Precision DNN Accelerator Controlled by a RISC-V CPU. ASP-DAC 2023: 483-489 - [c283]El-Mehdi Makhroute, Mohammed-Ayoub Elharti, Vincent Brouillard, Yvon Savaria, Tarek Ould-Bachir:
Implementing and Evaluating a P4-based Access Gateway Function on a Tofino Switch. CommNet 2023: 1-7 - [c282]Roya Alizadeh, Yvon Savaria, Chahé Nerguizian:
Enabling Human Activity Recognition in Smart Public Transportation Systems in Presence of Dataset Imbalance. ICECS 2023: 1-5 - [c281]MohammadHossein AskariHemmat, Théo Dupuis, Yoan Fournier, Nizar El Zarif, Matheus A. Cavalcante, Matteo Perotti, Frank K. Gürkaynak, Luca Benini, François Leduc-Primeau, Yvon Savaria, Jean-Pierre David:
Quark: An Integer RISC-V Vector Processor for Sub-Byte Quantized DNN Inference. ISCAS 2023: 1-5 - [c280]Parisa Mashreghi-Moghadam, Tarek Ould-Bachir, Yvon Savaria:
An Area-efficient Memory-based Architecture for P4-programmable Streaming Parsers in FPGAs. ISCAS 2023: 1-5 - [c279]Théo Dupuis, Yoan Fournier, MohammadHossein AskariHemmat, Nizar El Zarif, François Leduc-Primeau, Jean-Pierre David, Yvon Savaria:
Sparq: A Custom RISC-V Vector Processor for Efficient Sub-Byte Quantized Inference. NEWCAS 2023: 1-5 - [c278]Dufour Jules, Yvon Savaria, Jean-Pierre David:
Low-Energy, Scalable, On-demand State-of-charge Estimation System for Li-ion batteries. NEWCAS 2023: 1-5 - [c277]Hamidreza Mafi, Mohamed Ali, Yvon Savaria, Mohammad Honarparvar, Naim Ben-Hamida:
Background Calibration of Time-Interleaved ADCs with Polyphase Filters. NEWCAS 2023: 1-5 - [c276]Ahmad Hassan, Aref Trigui, Yvon Savaria, Mohamad Sawan:
High-Temperature Fully Integrated Wireless Monitoring Systems for Aerospace Applications. WiSEE 2023: 47-52 - [i18]Mohammadhossein Askarihemmat, Sean Wagner, Olexa Bilaniuk, Yassine Hariri, Yvon Savaria, Jean-Pierre David:
BARVINN: Arbitrary Precision DNN Accelerator Controlled by a RISC-V CPU. CoRR abs/2301.00290 (2023) - [i17]MohammadHossein AskariHemmat, Théo Dupuis, Yoan Fournier, Nizar El Zarif, Matheus A. Cavalcante, Matteo Perotti, Frank K. Gürkaynak, Luca Benini, François Leduc-Primeau, Yvon Savaria, Jean-Pierre David:
Quark: An Integer RISC-V Vector Processor for Sub-Byte Quantized DNN Inference. CoRR abs/2302.05996 (2023) - [i16]Alireza Ghaffari, Masoud Asgharian, Yvon Savaria:
Statistical Hardware Design With Multi-model Active Learning. CoRR abs/2303.08054 (2023) - [i15]Théo Dupuis, Yoan Fournier, MohammadHossein AskariHemmat, Nizar El Zarif, François Leduc-Primeau, Jean-Pierre David, Yvon Savaria:
Sparq: A Custom RISC-V Vector Processor for Efficient Sub-Byte Quantized Inference. CoRR abs/2306.09905 (2023) - 2022
- [j121]Reza Gholami Taghizadeh, Mohammadreza Binesh Marvasti, Seyyed Amir Asghari, Ramin Gholami Taghizadeh, Morteza Nabavi, Yvon Savaria:
IBU: An In-Block Update Address Mapping Scheme for Solid-State Drives. IEEE Access 10: 4934-4947 (2022) - [j120]Mohamed Ali, Ahmad Hassan, Mohammad Honarparvar, Morteza Nabavi, Yves Audet, Mohamad Sawan, Yvon Savaria:
A Versatile SoC/SiP Sensor Interface for Industrial Applications: Implementation Challenges. IEEE Access 10: 24540-24555 (2022) - [j119]Ali Forghani Elah Abadi, Seyyed Amir Asghari, Mohammadreza Binesh Marvasti, Golnoush Abaei, Morteza Nabavi, Yvon Savaria:
RLBEEP: Reinforcement-Learning-Based Energy Efficient Control and Routing Protocol for Wireless Sensor Networks. IEEE Access 10: 44123-44135 (2022) - [j118]Amin Faraji, Sayed Alireza Sadrossadat, Mahdi Yazdian Dehkordi, Morteza Nabavi, Yvon Savaria:
A Hybrid Approach Based on Recurrent Neural Network for Macromodeling of Nonlinear Electronic Circuits. IEEE Access 10: 127996-128006 (2022) - [j117]Yuzhan Wu, Meng Li, Guannan Li, Yvon Savaria:
Persistence Region Monitor With a Pheromone-Inspired Robot Swarm Sensor Network. IEEE Internet Things J. 9(14): 12093-12110 (2022) - [j116]Aziz Oukaira, Ahmad Hassan, Mohamed Ali, Yvon Savaria, Ahmed Lakhssassi:
Towards Real-Time Monitoring of Thermal Peaks in Systems-on-Chip (SoC). Sensors 22(15): 5904 (2022) - [j115]Abbas Hammoud, Hussein Assaf, Yvon Savaria, Dang Khoa Nguyen, Mohamad Sawan:
A Molecular Imprinted PEDOT CMOS Chip-Based Biosensor for Carbamazepine Detection. IEEE Trans. Biomed. Circuits Syst. 16(1): 15-23 (2022) - [j114]Seyed Mohammad Noghabaei, Rafael L. Radin, Yvon Savaria, Mohamad Sawan:
A High-Sensitivity Wide Input-Power-Range Ultra-Low-Power RF Energy Harvester for IoT Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 440-451 (2022) - [c275]Jonathan Kern, Sébastien Henwood, Gonçalo Mordido, Elsa Dupraz, Abdeldjalil Aïssa-El-Bey, Yvon Savaria, François Leduc-Primeau:
MemSE: Fast MSE Prediction for Noisy Memristor-Based DNN Accelerators. AICAS 2022: 62-65 - [c274]Yang Zhang, Yvon Savaria, Shiqi Zhao, Gonçalo Mordido, Mohamad Sawan, François Leduc-Primeau:
Tiny CNN for Seizure Prediction in Wearable Biomedical Devices. EMBC 2022: 1306-1309 - [c273]Roya Alizadeh, Yvon Savaria, Chahé Nerguizian:
Automatic Detection of People Getting Into a Bus in a SMART Public Transportation System. ICECS 2022 2022: 1-4 - [c272]Parisa Mashreghi-Moghadam, Tarek Ould-Bachir, Yvon Savaria:
A Templated VHDL Architecture for Terabit/s P4-programmable FPGA-based Packet Parsing. ISCAS 2022: 672-676 - [c271]Julien Posso, Guy Bois, Yvon Savaria:
Mobile-URSONet: an Embeddable Neural Network for Onboard Spacecraft Pose Estimation. ISCAS 2022: 794-798 - [c270]Mengyue Su, Jean-Pierre David, Yvon Savaria, Bill Pontikakis, Thomas Luinaud:
An FPGA-based HW/SW Co-Verification Environment for Programmable Network Devices. ISCAS 2022: 2529-2533 - [c269]Jörg Ehmer, Bertrand Granado, Julien Denoulet, Yvon Savaria, Jean-Pierre David:
Low Complexity Shallow Neural Network With Improved False Negative Rate for Cyber Intrusion Detection Systems. NEWCAS 2022: 168-172 - [c268]Nader El-Zarif, Mohamed Ali, Mostafa Amer, Ahmad Hassan, Aziz Oukaira, Ahmed Lakhssassi, Christian Jesús B. Fayomi, Yvon Savaria:
Investigation of Different Integrated Temperature Monitoring Sensors for High-Voltage SoC DC-DC Converters. NEWCAS 2022: 178-182 - [i14]Vahid Partovi Nia, Alireza Ghaffari, Mahdi Zolnouri, Yvon Savaria:
Rethinking Pareto Frontier for Performance Evaluation of Deep Neural Networks. CoRR abs/2202.09275 (2022) - [i13]Jonathan Kern, Sébastien Henwood, Gonçalo Mordido, Elsa Dupraz, Abdeldjalil Aïssa-El-Bey, Yvon Savaria, François Leduc-Primeau:
MemSE: Fast MSE Prediction for Noisy Memristor-Based DNN Accelerators. CoRR abs/2205.01707 (2022) - [i12]Julien Posso, Guy Bois, Yvon Savaria:
Mobile-URSONet: an Embeddable Neural Network for Onboard Spacecraft Pose Estimation. CoRR abs/2205.02065 (2022) - [i11]MohammadHossein AskariHemmat, Reyhane Askari Hemmat, Alexander Hoffman, Ivan Lazarevich, Ehsan Saboori, Olivier Mastropietro, Yvon Savaria, Jean-Pierre David:
QReg: On Regularization Effects of Quantization. CoRR abs/2206.12372 (2022) - 2021
- [j113]Alireza Ghaffari, Yvon Savaria:
Efficient Design Space Exploration of OpenCL Kernels for FPGA Targets Using Black Box Optimization. IEEE Access 9: 136819-136830 (2021) - [j112]Mickaël Fiorentino, Claude Thibeault, Yvon Savaria:
Introducing KeyRing self-timed microarchitecture and timing-driven design flow. IET Comput. Digit. Tech. 15(6): 409-426 (2021) - [j111]Masoume Akbari, Mohammad Honarparvar, Yvon Savaria, Mohamad Sawan:
Power Bound Analysis of a Two-Step MASH Incremental ADC Based on Noise-Shaping SAR ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 68(8): 3133-3146 (2021) - [j110]Safa Berrima, Yves Blaquière, Yvon Savaria:
Ring-Oscillator-Based High Accuracy Low Complexity Multichannel Time-to-Digital Converter Architecture for Field-Programmable Gate Arrays. IEEE Trans. Instrum. Meas. 70: 1-10 (2021) - [j109]Jun Wang, Yajun Zeng, Shaoming Wei, Zixiang Wei, Qinchen Wu, Yvon Savaria:
Multi-Sensor Track-to-Track Association and Spatial Registration Algorithm Under Incomplete Measurements. IEEE Trans. Signal Process. 69: 3337-3350 (2021) - [c267]Roya Alizadeh, Yvon Savaria, Chahé Nerguizian:
Human Activity Recognition and People Count for a SMART Public Transportation System. 5GWF 2021: 182-187 - [c266]Thomas Luinaud, Jeferson Santiago da Silva, J. M. Pierre Langlois, Yvon Savaria:
Design Principles for Packet Deparsers on FPGAs. FPGA 2021: 280-286 - [c265]Ibrahim Alhousseiny, Mohamed Ali, Naim Ben-Hamida, Mohammad Honarparvar, Mohamad Sawan, Yvon Savaria:
Delay-Locked Loop Based Multiphase Clock Generator for Time-Interleaved ADCs. ICECS 2021: 1-4 - [c264]Ahmed Abuelnasr, Mostafa Amer, Ahmed Ragab, Benoit Gosselin, Yvon Savaria:
Causal Information Prediction for Analog Circuit Design Using Variable Selection Methods Based on Machine Learning. ISCAS 2021: 1-5 - [c263]Mostafa Amer, Ahmed Abuelnasr, Ahmed Ragab, Ahmad Hassan, Mohamed Ali, Benoit Gosselin, Mohamad Sawan, Yvon Savaria:
Design and Analysis of Combined Input-Voltage Feedforward and PI Controllers for the Buck Converter. ISCAS 2021: 1-5 - [c262]MohammadHossein AskariHemmat, Olexa Bilaniuk, Sean Wagner, Yvon Savaria, Jean-Pierre David:
RISC-V Barrel Processor for Deep Neural Network Acceleration. ISCAS 2021: 1-5 - [c261]Hachem Bensalem, Yves Blaquière, Yvon Savaria:
Acceleration of the Secure Hash Algorithm-256 (SHA-256) on an FPGA-CPU Cluster Using OpenCL. ISCAS 2021: 1-5 - [c260]Aziz Oukaira, Touati Djallel eddine, Ahmad Hassan, Mohamed Ali, Yvon Savaria, Ahmed Lakhssassi:
Thermo-mechanical Analysis and Fatigue Life Prediction for Integrated Circuits (ICs). MWSCAS 2021: 630-634 - [c259]Zahra Qavamy, Behnam Ghavami, Morteza Nabavi, Yvon Savaria:
Non-parametric Statistical Static Timing Analysis based on Improved Parallel Monte Carlo. MWSCAS 2021: 648-651 - [c258]Touati Djallel eddine, Aziz Oukaira, Ahmad Hassan, Yvon Savaria, Ahmed Lakhssassi:
Foster-based Transient Thermal Analysis of SiP for Thermomechanical Studies. NEWCAS 2021: 1-4 - [i10]Thomas Luinaud, Jeferson Santiago da Silva, J. M. Pierre Langlois, Yvon Savaria:
Design Principles for Packet Deparsers on FPGAs. CoRR abs/2103.07750 (2021) - 2020
- [j108]Hachem Bensalem, Yves Blaquière, Yvon Savaria:
In-FPGA Instrumentation Framework for OpenCL-Based Designs. IEEE Access 8: 212979-212994 (2020) - [j107]Safa Berrima, Yves Blaquière, Yvon Savaria:
Fine resolution delay tuning method to improve the linearity of an unbalanced time-to-digital converter on a Xilinx FPGA. IET Circuits Devices Syst. 14(8): 1243-1252 (2020) - [j106]Ouafaa Ettahri, Aziz Oukaira, Mohamed Ali, Ahmad Hassan, Morteza Nabavi, Yvon Savaria, Ahmed Lakhssassi:
A Real-Time Thermal Monitoring System Intended for Embedded Sensors Interfaces. Sensors 20(19): 5657 (2020) - [j105]Ahmad Hassan, Mostafa Amer, Yvon Savaria, Mohamad Sawan:
Fully Integrated Digital GaN-Based LSK Demodulator for High-Temperature Applications. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1579-1583 (2020) - [j104]Aref Trigui, Mohamed Ali, Sami Hached, Jean-Pierre David, Ahmed Chiheb Ammari, Yvon Savaria, Mohamad Sawan:
Generic Wireless Power Transfer and Data Communication System Based on a Novel Modulation Technique. IEEE Trans. Circuits Syst. 67-I(11): 3978-3990 (2020) - [j103]Gabriel Laparra, Meng Li, Guchuan Zhu, Yvon Savaria:
Desynchronized Model Predictive Control for Large Populations of Fans in Server Racks of Datacenters. IEEE Trans. Smart Grid 11(1): 411-419 (2020) - [j102]Omar Al-Terkawi Hasib, Yvon Savaria, Claude Thibeault:
Optimization of Small-Delay Defects Test Quality by Clock Speed Selection and Proper Masking Based on the Weighted Slack Percentage. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 764-776 (2020) - [c257]Sébastien Henwood, François Leduc-Primeau, Yvon Savaria:
Layerwise Noise Maximisation to Train Low-Energy Deep Neural Networks. AICAS 2020: 271-275 - [c256]MohammadHossein AskariHemmat, Olexa Bilaniuk, Sean Wagner, Yvon Savaria, Jean-Pierre David:
RISC-V Barrel Processor for Accelerator Control. FCCM 2020: 212 - [c255]Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva, Yvon Savaria, J. M. Pierre Langlois:
Unleashing the Power of FPGAs as Programmable Switches. FPGA 2020: 311 - [c254]Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva, Yvon Savaria, J. M. Pierre Langlois:
Bridging the Gap: FPGAs as Programmable Switches. HPSR 2020: 1-7 - [c253]Milad Salehi, Mohamed Ali, Yvon Savaria, Mohamad Sawan:
A 58 nW ± 35 ppm/°C Oscillator for IoT Battery-less Sensor Applications. ICECS 2020: 1-4 - [c252]Mohamed Amine Bensenouci, Mohamed Ali, Hammoudi Escid, Yvon Savaria, Mohamad Sawan:
A VCO-Based Nonuniform Sampling ADC Using a Slope-Dependent Pulse Generator. ICM 2020: 1-4 - [c251]Ahmed Abuelnasr, Mohamed Ali, Mostafa Amer, Morteza Nabavi, Ahmad Hassan, Benoit Gosselin, Yvon Savaria:
Self-Adjusting Deadtime Generator for High-Efficiency High-Voltage Switched-Mode Power Amplifiers. ISCAS 2020: 1-5 - [c250]Masoume Akbari, Mohammad Honarparvar, Yvon Savaria, Mohamad Sawan:
OTA-Free MASH 2-2 Noise Shaping SAR ADC: System and Design Considerations. ISCAS 2020: 1-5 - [c249]Armin Najarpour Foroushani, Hussein Assaf, Fereidoon Hashemi Noshahr, Yvon Savaria, Mohamad Sawan:
Analog Circuits to Accelerate the Relaxation Process in the Equilibrium Propagation Algorithm. ISCAS 2020: 1-5 - [c248]Nader El-Zarif, Mohamed Ali, Ahmad Hassan, Morteza Nabavi, Christian Jesús B. Fayomi, Yvon Savaria:
A High Efficiency and Fast Response PLL Based Buck Converter: Implementation and Simulation. LASCAS 2020: 1-4 - [c247]Roghayeh Saeidi, Morteza Nabavi, Yvon Savaria:
SRAM Security and Vulnerability To Hardware Trojan: Design Considerations. MWSCAS 2020: 722-725 - [c246]Masoume Akbari, Mohammad Honarparvar, Yvon Savaria, Mohamad Sawan:
OTA-Free MASH Two-Step Incremental ADC based on Noise Shaping SAR ADCs. NEWCAS 2020: 138-141 - [c245]Mostafa Amer, Mohamed Ali, Ahmed Abuelnasr, Ahmad Hassan, Morteza Nabavi, Yvon Savaria, Mohamad Sawan:
Fully Integrated Dual-Channel Gate Driver and Area Efficient PID Compensator for Surge Tolerant Power Sensor Interface. NEWCAS 2020: 166-169 - [c244]Ahmad Hassan, Mostafa Amer, Yvon Savaria, Mohamad Sawan:
Towards GaN500-based High Temperature ICs: Characterization and Modeling up to 600°C. NEWCAS 2020: 275-278 - [c243]Seyed Mohsen Samadani, Yvon Savaria, Chahé Nerguizian:
Indoor Localization Using Channel State Information With Regression Artificial Neural Networks. VTC Spring 2020: 1-4 - [p3]Simon Pierre Boyogueno Bidias, Jean-Pierre David, Yvon Savaria, Réjean Plamondon:
On the Use of Interval Arithmetic for the Branch and Bound Delta-Lognormal Parameter Extraction of Rapid Human Movements. The Lognormality Principle 2020: 309-325 - [i9]Alireza Ghaffari, Yvon Savaria:
CNN2Gate: Toward Designing a General Framework for Implementation of Convolutional Neural Networks on FPGA. CoRR abs/2004.04641 (2020) - [i8]Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva, Yvon Savaria, J. M. Pierre Langlois:
Bridging the Gap: FPGAs as Programmable Switches. CoRR abs/2004.07733 (2020)
2010 – 2019
- 2019
- [j101]Imad Benacer, François-Raymond Boyer, Yvon Savaria:
A High-Speed, Scalable, and Programmable Traffic Manager Architecture for Flow-Based Networking. IEEE Access 7: 2231-2243 (2019) - [j100]Alireza Ghaffari, Mathieu Léonardon, Adrien Cassagne, Camille Leroux, Yvon Savaria:
Toward High-Performance Implementation of 5G SCMA Algorithms. IEEE Access 7: 10402-10414 (2019) - [j99]Marwan Ammar, Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria:
Towards an Accurate Probabilistic Modeling and Statistical Analysis of Temporal Faults via Temporal Dynamic Fault-Trees (TDFTs). IEEE Access 7: 29264-29276 (2019) - [j98]Imad Benacer, François-Raymond Boyer, Yvon Savaria:
HPQS: A Fast, High-Capacity, Hybrid Priority Queuing System for High-Speed Networking Devices. IEEE Access 7: 130672-130684 (2019) - [j97]Aref Trigui, Mohamed Ali, Ahmed Chiheb Ammari, Yvon Savaria, Mohamad Sawan:
Energy Efficient Generic Demodulator for High Data Transmission Rate Over an Inductive Link for Implantable Devices. IEEE Access 7: 159379-159389 (2019) - [j96]Omar Al-Terkawi Hasib, Yvon Savaria, Claude Thibeault:
Multi-PVT-Point Analysis and Comparison of Recent Small-Delay Defect Quality Metrics. J. Electron. Test. 35(6): 823-838 (2019) - [j95]Ahmad Hassan, Mohamed Ali, Yvon Savaria, Mohamad Sawan:
GaN-based LSK demodulators for wireless data receivers in high-temperature applications. Microelectron. J. 84: 129-135 (2019) - [j94]Khaza Anuarul Hoque, Otmane Aït Mohamed, Yvon Savaria:
Dependability modeling and optimization of triple modular redundancy partitioning for SRAM-based FPGAs. Reliab. Eng. Syst. Saf. 182: 107-119 (2019) - [j93]Ahmad Hassan, Mohamed Ali, Aref Trigui, Yvon Savaria, Mohamad Sawan:
A GaN-Based Wireless Monitoring System for High-Temperature Applications. Sensors 19(8): 1785 (2019) - [j92]Thibaut Stimpfling, Normand Bélanger, J. M. Pierre Langlois, Yvon Savaria:
SHIP: A Scalable High-Performance IPv6 Lookup Algorithm That Exploits Prefix Characteristics. IEEE/ACM Trans. Netw. 27(4): 1529-1542 (2019) - [j91]Nicolas Laflamme-Mayer, Gilbert Kowarzyk, Yves Blaquière, Yvon Savaria, Mohamad Sawan:
A Defect-Tolerant Reusable Network of DACs for Wafer-Scale Integration. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 304-315 (2019) - [j90]Mathieu Léonardon, Adrien Cassagne, Camille Leroux, Christophe Jégo, Louis-Philippe Hamelin, Yvon Savaria:
Fast and Flexible Software Polar List Decoders. J. Signal Process. Syst. 91(8): 937-952 (2019) - [c242]Hussein Assaf, Yvon Savaria, Mohamad Sawan:
Memristor Emulators for an Adaptive DPE Algorithm: Comparative Study. AICAS 2019: 13-17 - [c241]Mickaël Fiorentino, Claude Thibeault, Yvon Savaria, François Gagnon, Tom Awad, Doug Morrissey, Michel Laurence:
AnARM: A 28nm Energy Efficient ARM Processor Based on Octasic Asynchronous Technology. ASYNC 2019: 58-59 - [c240]Mohamed Ali, Morteza Nabavi, Ahmad Hassan, Mohammad Honarparvar, Yvon Savaria, Mohamad Sawan:
A Versatile SoC/SiP Sensor Interface for Industrial Applications: Design Considerations. ICM 2019: 40-43 - [c239]Hachem Bensalem, Yves Blaquière, Yvon Savaria:
Toward In-System Monitoring of OpenCL-Based Designs on FPGA. ISCAS 2019: 1-5 - [c238]Maryem Benyoussef, Claude Thibeault, Yvon Savaria:
A Prediction Model for Implementing DVS in Single-Rail Bundled-Data Handshake-Free Asynchronous Circuits. ISCAS 2019: 1-5 - [c237]Olexa Bilaniuk, Sean Wagner, Yvon Savaria, Jean-Pierre David:
Bit-Slicing FPGA Accelerator for Quantized Neural Networks. ISCAS 2019: 1-5 - [c236]MohammadHossein AskariHemmat, Sina Honari, Lucas Rouhier, Christian S. Perone, Julien Cohen-Adad, Yvon Savaria, Jean-Pierre David:
U-Net Fixed-Point Quantization for Medical Image Segmentation. LABELS/HAL-MICCAI/CuRIOUS@MICCAI 2019: 115-124 - [i7]MohammadHossein AskariHemmat, Sina Honari, Lucas Rouhier, Christian S. Perone, Julien Cohen-Adad, Yvon Savaria, Jean-Pierre David:
U-Net Fixed-Point Quantization for Medical Image Segmentation. CoRR abs/1908.01073 (2019) - [i6]Sébastien Henwood, François Leduc-Primeau, Yvon Savaria:
Layerwise Noise Maximisation to Train Low-Energy Deep Neural Networks. CoRR abs/1912.10764 (2019) - 2018
- [j89]Ghaith Bany Hamad, Marwan Ammar, Otmane Aït Mohamed, Yvon Savaria:
New Insights Into Soft-Faults Induced Cardiac Pacemakers Malfunctions Analyzed at System-Level via Model Checking. IEEE Access 6: 62107-62119 (2018) - [j88]Michel Gemieux, Meng Li, Yvon Savaria, Jean-Pierre David, Guchuan Zhu:
A Hybrid Architecture With Low Latency Interfaces Enabling Dynamic Cache Management. IEEE Access 6: 62826-62839 (2018) - [j87]Ahmad Hassan, Yvon Savaria, Mohamad Sawan:
GaN Integration Technology, an Ideal Candidate for High-Temperature Applications: A Review. IEEE Access 6: 78790-78802 (2018) - [j86]Shervin Vakili, J. M. Pierre Langlois, Yvon Savaria, Naraig Manjikian:
Enhanced Bloom filter utilisation scheme for string matching using a splitting approach. IET Commun. 12(7): 868-875 (2018) - [j85]Safa Berrima, Yves Blaquière, Yvon Savaria:
Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits. Integr. 62: 159-169 (2018) - [j84]Etienne Lepercq, Yves Blaquière, Yvon Savaria:
A pattern-based routing algorithm for a novel electronic system prototyping platform. Integr. 62: 224-237 (2018) - [j83]Maryam Mohajertehrani, Yvon Savaria, Mohamad Sawan:
Harvesting Energy From Aviation Data Lines: Implementation and Experimental Results. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(6): 2048-2057 (2018) - [j82]Aref Trigui, Mohamed Ali, Ahmed Chiheb Ammari, Yvon Savaria, Mohamad Sawan:
A 1.5-pJ/bit, 9.04-Mbit/s Carrier-Width Demodulator for Data Transmission Over an Inductive Link Supporting Power and Data Transfer. IEEE Trans. Circuits Syst. II Express Briefs 65-II(10): 1420-1424 (2018) - [j81]Imad Benacer, François-Raymond Boyer, Yvon Savaria:
A Fast, Single-Instruction-Multiple-Data, Scalable Priority Queue. IEEE Trans. Very Large Scale Integr. Syst. 26(10): 1939-1952 (2018) - [j80]Ahmad Hassan, Yvon Savaria, Mohamad Sawan:
Electronics and Packaging Intended for Emerging Harsh Environment Applications: A Review. IEEE Trans. Very Large Scale Integr. Syst. 26(10): 2085-2098 (2018) - [c235]Thibaut Stimpfling, J. M. Pierre Langlois, Normand Bélanger, Yvon Savaria:
A Low-Latency Memory-Efficient IPv6 Lookup Engine Implemented on FPGA Using High-Level Synthesis. CCGrid 2018: 402-411 - [c234]Marwan Ammar, Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria:
Reliability Analysis of the SPARC V8 Architecture via Fault Trees and UPPAL-SMC. ICECS 2018: 437-440 - [c233]Hussein Assaf, Yvon Savaria, Mohamad Sawan:
Vector Matrix Multiplication Using Crossbar Arrays: A Comparative Analysis. ICECS 2018: 609-612 - [c232]Ahmed Abubakr, Ahmad Hassan, Ahmed Ragab, Soumaya Yacout, Yvon Savaria, Mohamad Sawan:
High-Temperature Modeling of the I-V Characteristics of GaN150 HEMT Using Machine Learning Techniques. ISCAS 2018: 1-5 - [c231]Mostafa Amer, Ahmad Hassan, Ahmed Ragab, Soumaya Yacout, Yvon Savaria, Mohamad Sawan:
High-Temperature Empirical Modeling for the I-V Characteristics of GaN150-Based HEMT. ISCAS 2018: 1-5 - [c230]Imad Benacer, François-Raymond Boyer, Yvon Savaria:
Design of a Low Latency 40 Gb/s Flow-Based Traffic Manager Using High-Level Synthesis. ISCAS 2018: 1-5 - [c229]Bachir Fradj, Benjamin Wolff, Normand Bélanger, Yvon Savaria:
Implementation of a Cache-Based IPv6 Lookup System with Hashing. ISCAS 2018: 1-4 - [c228]Mathieu Léonardon, Camille Leroux, David Binet, J. M. Pierre Langlois, Christophe Jégo, Yvon Savaria:
Custom Low Power Processor for Polar Decoding. ISCAS 2018: 1-5 - [c227]Seyed Mohammad Noghabaei, Rafael L. Radin, Yvon Savaria, Mohamad Sawan:
A High-Efficiency Ultra-Low-Power CMOS Rectifier for RF Energy Harvesting Applications. ISCAS 2018: 1-4 - [c226]Mathieu Léonardon, Camille Leroux, Pekka Jääskeläinen, Christophe Jégo, Yvon Savaria:
Transport Triggered Polar Decoders. ISTC 2018: 1-5 - [c225]Meng Li, Chao Chen, Guchuan Zhu, Yvon Savaria:
Local Queueing-Based Data-Driven Task Scheduling for Multicore Systems. MWSCAS 2018: 897-900 - [c224]Benjamin Wolff, Bachir Fradj, Normand Bélanger, Yvon Savaria:
Extending a CPU Cache for Efficient IPv6 Lookup. MWSCAS 2018: 1054-1057 - [c223]Imad Benacer, François-Raymond Boyer, Yvon Savaria:
HPQ: A High Capacity Hybrid Priority Queue Architecture for High-Speed Network Switches. NEWCAS 2018: 229-233 - [c222]Omar Al-Terkawi Hasib, Daniel Crepeau, Thomas Awad, Andrei Dulipovici, Yvon Savaria, Claude Thibeault:
Exploiting built-in delay lines for applying launch-on-capture at-speed testing on self-timed circuits. VTS 2018: 1-6 - [i5]Khaza Anuarul Hoque, Otmane Aït Mohamed, Yvon Savaria:
Formal Dependability Modeling and Optimization of Scrubbed-Partitioned TMR for SRAM-based FPGAs. CoRR abs/1801.04886 (2018) - 2017
- [j79]Kaijun Yang, Meng Li, Guchuan Zhu, Yvon Savaria:
A DAQM-Based Load Balancing Scheme for High Performance Computing Platforms. IEEE Access 5: 22504-22513 (2017) - [j78]Thibaut Stimpfling, Normand Bélanger, Omar Cherkaoui, André Béliveau, Ludovic Béliveau, Yvon Savaria:
Extensions to decision-tree based packet classification algorithms to address new classification paradigms. Comput. Networks 122: 83-95 (2017) - [j77]Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria:
Formal Methods Based Synthesis of Single Event Transient Tolerant Combinational Circuits. J. Electron. Test. 33(5): 607-620 (2017) - [j76]Khaza Anuarul Hoque, Otmane Aït Mohamed, Yvon Savaria:
Formal analysis of SEU mitigation for early dependability and performability analysis of FPGA-based space applications. J. Appl. Log. 25: 47-68 (2017) - [j75]Meng Li, Guchuan Zhu, Yvon Savaria, Michaël Lauer:
Reliability Enhancement of Redundancy Management in AFDX Networks. IEEE Trans. Ind. Informatics 13(5): 2118-2129 (2017) - [c221]Faika Hoque, Yvon Savaria, Christian Cardinal:
Joint power control and beamformer design with antenna selection. CCECE 2017: 1-4 - [c220]Thomas Luinaud, Yvon Savaria, J. M. Pierre Langlois:
An FPGA Overlay Architecture for Cost Effective Regular Expression Search (Abstract Only). FPGA 2017: 287-288 - [c219]Ghaith Kazma, Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria:
Analysis of SEU Propagation in Combinational Circuits at RTL Based on Satisfiability Modulo Theories. ACM Great Lakes Symposium on VLSI 2017: 239-244 - [c218]Thomas Luinaud, Yvon Savaria, J. M. Pierre Langlois:
An FPGA Coarse Grained Intermediate Fabric for Regular Expression Search. ACM Great Lakes Symposium on VLSI 2017: 423-426 - [c217]Ghaith Bany Hamad, Ghaith Kazma, Otmane Aït Mohamed, Yvon Savaria:
Comprehensive analysis of sequential circuits vulnerability to transient faults using SMT. IOLTS 2017: 33-38 - [c216]Safa Berrima, Yves Blaquière, Yvon Savaria:
A multi-measurements RO-TDC implemented in a Xilinx field programmable gate array. ISCAS 2017: 1-4 - [c215]Ideh Sarbishei, Shervin Vakili, J. M. Pierre Langlois, Yvon Savaria:
Scalable memory-less architecture for string matching with FPGAs. ISCAS 2017: 1-4 - [c214]Michel Gemieux, Yvon Savaria, Jean-Pierre David, Guchuan Zhu:
A Cache-Coherent Heterogeneous Architecture for Low Latency Real Time Applications. ISORC 2017: 176-184 - [c213]Safa Berrima, Yves Blaquière, Yvon Savaria:
Sub-ps resolution programmable delays implemented in a Xilinx FPGA. MWSCAS 2017: 918-921 - [c212]Alireza Ghaffari, Mathieu Léonardon, Yvon Savaria, Christophe Jégo, Camille Leroux:
Improving performance of SCMA MPA decoders using estimation of conditional probabilities. NEWCAS 2017: 21-24 - [c211]Ahmad Hassan, Mohamed Ali, Aref Trigui, Sami Hached, Yvon Savaria, Mohamad Sawan:
Stability of GaN150-based HEMT in high temperature up to 400°C. NEWCAS 2017: 133-136 - [c210]Imad Benacer, François-Raymond Boyer, Yvon Savaria:
A high-speed traffic manager architecture for flow-based networking. NEWCAS 2017: 161-164 - [c209]Ghaith Kazma, Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria:
Analysis of SEU propagation in sequential circuits at RTL using Satisfiability Modulo Theories. NEWCAS 2017: 237-240 - [c208]Himan Khanzadi, Yvon Savaria, Jean-Pierre David:
A data driven CGRA Overlay Architecture with embedded processors. NEWCAS 2017: 269-272 - [c207]Mickaël Fiorentino, Yvon Savaria, Claude Thibeault:
FPGA implementation of Token-based Self-timed processors: A case study. NEWCAS 2017: 313-316 - [c206]Aref Trigui, Mohamed Ali, Ahmed Chiheb Ammari, Yvon Savaria, Mohamad Sawan:
A 14.5 µW generic Carrier Width demodulator for telemetry-based Medical Devices. NEWCAS 2017: 369-372 - [i4]Khaza Anuarul Hoque, Otmane Aït Mohamed, Yvon Savaria:
Formal Analysis of SEU Mitigation for Early Dependability and Performability Analysis of FPGA-based Space Applications. CoRR abs/1701.03836 (2017) - [i3]Mathieu Léonardon, Adrien Cassagne, Camille Leroux, Christophe Jégo, Louis-Philippe Hamelin, Yvon Savaria:
Fast and Flexible Software Polar List Decoders. CoRR abs/1710.08314 (2017) - [i2]Thibaut Stimpfling, Normand Bélanger, J. M. Pierre Langlois, Yvon Savaria:
SHIP: A Scalable High-performance IPv6 Lookup Algorithm that Exploits Prefix Characteristics. CoRR abs/1711.09155 (2017) - 2016
- [j74]Wasim Hussain, Olivier Valorge, Yves Blaquière, Yvon Savaria:
A novel spatially configurable differential interface for an electronic system prototyping platform. Integr. 55: 129-137 (2016) - [j73]Wasim Hussain, Hussein Fakhoury, Patricia Desgreys, Yves Blaquière, Yvon Savaria:
An Asynchronous Delta-Modulator Based A/D Converter for an Electronic System Prototyping Platform. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(6): 751-762 (2016) - [j72]Ahmed Lakhssassi, Roman Palenychka, Yvon Savaria, Michel Sayde, Marek B. Zaremba:
Monitoring Thermal Stress in Wafer-Scale Integrated Circuits by the Attentive Vision Method Using an Infrared Camera. IEEE Trans. Circuits Syst. Video Technol. 26(2): 412-424 (2016) - [c205]Shervin Vakili, J. M. Pierre Langlois, Bochra Boughzala, Yvon Savaria:
Memory-Efficient String Matching for Intrusion Detection Systems using a High-Precision Pattern Grouping Algorithm. ANCS 2016: 37-42 - [c204]Fatima Zahra Tazi, Claude Thibeault, Yvon Savaria:
Detailed analysis of radiation-induced delays on I/O blocks of an SRAM-based FPGA. CCECE 2016: 1-5 - [c203]Marwan Ammar, Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria:
Efficient probabilistic fault tree analysis of safety critical systems via probabilistic model checking. FDL 2016: 1-8 - [c202]Ghaith Bany Hamad, Ghaith Kazma, Otmane Aït Mohamed, Yvon Savaria:
Comprehensive non-functional analysis of combinational circuits vulnerability to single event transients. FDL 2016: 1-7 - [c201]Ghaith Bany Hamad, Ghaith Kazma, Otmane Aït Mohamed, Yvon Savaria:
Efficient and accurate analysis of single event transients propagation using SMT-based techniques. ICCAD 2016: 54 - [c200]Roya Alizadeh, Yvon Savaria:
Performance analysis of a reduced complexity SCMA decoder exploiting a low-complexity maximum-likelihood approximation. ICECS 2016: 253-256 - [c199]Ghaith Kazma, Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria:
Investigating the efficiency and accuracy of a data type reduction technique for soft error analysis. ICECS 2016: 273-276 - [c198]Wasim Hussain, Yvon Savaria, Yves Blaquière:
A compact spatially configurable differential input stage for a field programmable interconnection network. ISCAS 2016: 313-316 - [c197]Mickaël Fiorentino, Yvon Savaria, Claude Thibeault, Pascal Gervais:
A practical design method for prototyping self-timed processors using FPGAs. ISCAS 2016: 1754-1757 - [c196]Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria:
Towards formal abstraction, modeling, and analysis of Single Event Transients at RTL. ISCAS 2016: 2166-2169 - [c195]Ahmad Hassan, Aref Trigui, Umar Shafique, Yvon Savaria, Mohamad Sawan:
Wireless power transfer through metallic barriers enclosing a harsh environment; feasibility and preliminary results. ISCAS 2016: 2391-2394 - [c194]Mounir Khelifi, Daniel Massicotte, Yvon Savaria:
Towards efficient and concurrent FFTs implementation on Intel Xeon/MIC clusters for LTE and HPC. ISCAS 2016: 2611-2614 - [c193]Roya Alizadeh, Normand Bélanger, Yvon Savaria, François R. Boyer:
Performance characterization of an SCMA decoder. NEWCAS 2016: 1-4 - [c192]Imad Benacer, François-Raymond Boyer, Normand Bélanger, Yvon Savaria:
A fast systolic priority queue architecture for a flow-based Traffic Manager. NEWCAS 2016: 1-4 - [c191]Michel Gemieux, Yvon Savaria, Guchuan Zhu, Jean-François Frigon:
Towards LTE physical layer virtualization on a COTS multicore platform with efficient scheduling. NEWCAS 2016: 1-4 - [c190]Aref Trigui, Mohamed Ali, Ahmed Chiheb Ammari, Yvon Savaria, Mohamad Sawan:
Quad-Level Carrier Width Modulation demodulator for micro-implants. NEWCAS 2016: 1-4 - [c189]Khaza Anuarul Hoque, Otmane Aït Mohamed, Yvon Savaria:
Applying formal verification to early assessment of FPGA-based aerospace applications: Methodology and experience. SysCon 2016: 1-6 - [c188]Omar Al-Terkawi Hasib, Yvon Savaria, Claude Thibeault:
WeSPer: A flexible small delay defect quality metric. VTS 2016: 1-6 - [p2]Donavan Prieur, Eric Granger, Yvon Savaria, Claude Thibeault:
Efficient identification of Faces in video Streams using low-Power Multi-Core Devices. Handbook of Pattern Recognition and Computer Vision 2016: 427-454 - 2015
- [j71]Ghaith Bany Hamad, Syed Rafay Hasan, Otmane Aït Mohamed, Yvon Savaria:
Characterizing, modeling, and analyzing soft error propagation in asynchronous and synchronous digital circuits. Microelectron. Reliab. 55(1): 238-250 (2015) - [j70]Wasim Hussain, Yves Blaquière, Yvon Savaria:
An Interface for Open-Drain Bidirectional Communication in Field Programmable Interconnection Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(10): 2465-2475 (2015) - [c187]Himan Khanzadi, Yvon Savaria, Jean-Pierre David:
Mapping applications on two-level configurable hardware. AHS 2015: 1-8 - [c186]Khaza Anuarul Hoque, Otmane Aït Mohamed, Yvon Savaria:
Towards an accurate reliability, availability and maintainability analysis approach for satellite systems based on probabilistic model checking. DATE 2015: 1635-1640 - [c185]Maryam Mohajertehrani, Umar Shafique, Yvon Savaria, Mohamad Sawan:
Harvesting energy from data lines for avionics applications: Power conversion chain architecture. ICM 2015: 55-58 - [c184]Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria:
Efficient multilevel formal analysis and estimation of design vulnerability to Single Event Transients. IOLTS 2015: 1-6 - [c183]Gontran Sion, Yves Blaquière, Yvon Savaria:
Defect diagnosis algorithms for a field programmable interconnect network embedded in a Very Large Area Integrated Circuit. IOLTS 2015: 83-88 - [c182]Pascal Nsame, Guy Bois, Yvon Savaria:
Analysis and characterization of data energy tradeoffs: For VLSI architectural agility in C-RAN platforms. ISCAS 2015: 1466-1469 - [c181]Zeynab Mirzadeh, Jean-François Boland, Yvon Savaria:
Modeling the faulty behaviour of digital designs using a feed forward neural network approach. ISCAS 2015: 1518-1521 - [c180]Hanieh Abdollahifakhr, Normand Bélanger, Yvon Savaria, François Gagnon:
Power-efficient hardware architecture for computing Split-Radix FFTs on highly sparsed spectrum. NEWCAS 2015: 1-4 - [c179]Roya Alizadeh, Normand Bélanger, Yvon Savaria, Jean-François Frigon:
DPDK and MKL; Enabling technologies for near deterministic cloud-based signal processing. NEWCAS 2015: 1-4 - [c178]Mickaël Fiorentino, Omar Al-Terkawi Hasib, Yvon Savaria, Claude Thibeault:
Self-timed circuits FPGA implementation flow. NEWCAS 2015: 1-4 - [c177]Mounir Khelifi, Daniel Massicotte, Yvon Savaria:
Parallel independent FFT implementation on intel processors and Xeon phi for LTE and OFDM systems. NORCAS 2015: 1-4 - [p1]Houman Zarrabi, A. J. Al-Khalili, Yvon Savaria:
Design Intelligence for Interconnection Realization in Power-Managed SoCs. Computational Intelligence in Digital and Network Designs and Applications 2015: 69-96 - 2014
- [j69]Qifeng Gan, J. M. Pierre Langlois, Yvon Savaria:
A Parallel Systematic Resampling Algorithm for High-Speed Particle Filters in Embedded Systems. Circuits Syst. Signal Process. 33(11): 3591-3602 (2014) - [j68]Rana Farah, Qifeng Gan, J. M. Pierre Langlois, Guillaume-Alexandre Bilodeau, Yvon Savaria:
A computationally efficient importance sampling tracking algorithm. Mach. Vis. Appl. 25(7): 1761-1777 (2014) - [j67]Nicolas Laflamme-Mayer, Yves Blaquière, Yvon Savaria, Mohamad Sawan:
A Configurable Multi-Rail Power and I/O Pad Applied to Wafer-Scale Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(11): 3135-3144 (2014) - [j66]Meng Li, Michaël Lauer, Guchuan Zhu, Yvon Savaria:
Determinism Enhancement of AFDX Networks via Frame Insertion and Sub-Virtual Link Aggregation. IEEE Trans. Ind. Informatics 10(3): 1684-1695 (2014) - [j65]Gilbert Kowarzyk, Normand Bélanger, David Haccoun, Yvon Savaria:
Optimizing the Parallel Tree-Search for Finding Shortest-Span Error-Correcting CDO Codes. IEEE Trans. Parallel Distributed Syst. 25(11): 2992-3001 (2014) - [j64]Qifeng Gan, J. M. Pierre Langlois, Yvon Savaria:
Efficient Uniform Quantization Likelihood Evaluation for Particle Filters in Embedded Implementations. J. Signal Process. Syst. 75(3): 191-202 (2014) - [c176]Rudy Deca, Omar Cherkaoui, Yvon Savaria:
Constraint-based configuration complexity model for autonomic network configuration management. GIIS 2014: 1-8 - [c175]Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria:
Probabilistic model checking of single event transient propagation at RTL level. ICECS 2014: 451-454 - [c174]Pascal Nsame, Guy Bois, Yvon Savaria:
A data-driven energy efficient and flexible compute fabric architecture: For adaptive computing applied to ULSI of FFT. ICECS 2014: 750-753 - [c173]Andreas Fischer, Réjean Plamondon, Christian O'Reilly, Yvon Savaria:
Neuromuscular Representation and Synthetic Generation of Handwritten Whiteboard Notes. ICFHR 2014: 222-227 - [c172]Ghaith Bany Hamad, Syed Rafay Hasan, Otmane Aït Mohamed, Yvon Savaria:
Abstracting Single Event Transient characteristics variations due to input patterns and fan-out. ISCAS 2014: 1468-1471 - [c171]Yves Blaquière, Yan Basile-Bellavance, Safa Berrima, Yvon Savaria:
Design and validation of a novel reconfigurable and defect tolerant JTAG scan chain. ISCAS 2014: 2559-2562 - [c170]Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria:
Vt-conscious repeater insertion in power-managed VLSI. ISIC 2014: 99-102 - [c169]Khaza Anuarul Hoque, Otmane Aït Mohamed, Yvon Savaria, Claude Thibeault:
Probabilistic model checking based DAL analysis to optimize a combined TMR-blind-scrubbing mitigation technique for FPGA-based aerospace applications. MEMOCODE 2014: 175-184 - [c168]Pascal Nsame, Guy Bois, Yvon Savaria:
Adaptive real-time DSP acceleration for SoC applications. MWSCAS 2014: 298-301 - [c167]Ghaith Bany Hamad, Syed Rafay Hasan, Otmane Aït Mohamed, Yvon Savaria:
Modeling, analyzing, and abstracting single event transient propagation at gate level. MWSCAS 2014: 515-518 - [c166]Pascal Nsame, Guy Bois, Yvon Savaria:
Design and Test of Adaptive Computing Fabrics for Scalable and High-Efficiency Cognitive SoC Applications. NATW 2014: 48-51 - [c165]Mohamed A. Shaheen, Anas A. Hamoui, Yvon Savaria:
A current-output DAC for low-power low-noise log-domain ΔΣ modulators. NEWCAS 2014: 281-284 - [c164]Thalie Keklikian, J. M. Pierre Langlois, Yvon Savaria:
A memory transaction model for Sparse Matrix-Vector multiplications on GPUs. NEWCAS 2014: 309-312 - [c163]Andreas Fischer, Réjean Plamondon, Yvon Savaria, Kaspar Riesen, Horst Bunke:
A Hausdorff Heuristic for Efficient Computation of Graph Edit Distance. S+SSPR 2014: 83-92 - [i1]Fatima Zahra Tazi, Claude Thibeault, Yvon Savaria, Simon Pichette, Yves Audet:
On Delay Faults Affecting I/O Blocks of an SRAM-Based FPGA Due to Ionizing Radiations. CoRR abs/1409.0736 (2014) - 2013
- [j63]Claude Thibeault, Yassine Hariri, Syed Rafay Hasan, Christelle Hobeika, Yvon Savaria, Yves Audet, Fatima Zahra Tazi:
A Library-Based Early Soft Error Sensitivity Analysis Technique for SRAM-Based FPGA Design. J. Electron. Test. 29(4): 457-471 (2013) - [j62]Gilbert Kowarzyk, Normand Bélanger, David Haccoun, Yvon Savaria:
Efficient Parallel Search Algorithm for Determining Optimal R=1/2 Systematic Convolutional Self-Doubly Orthogonal Codes. IEEE Trans. Commun. 61(3): 865-876 (2013) - [c162]Mikael Guillemot, Yves Blaquière, Yvon Savaria:
Software rendering methods to display wafer scale integrated circuit dataset. CCECE 2013: 1-4 - [c161]Diana Carolina Gil, J. M. Pierre Langlois, Yvon Savaria:
Accelerating a modified Gaussian pyramid with a customized processor. DASIP 2013: 259-264 - [c160]Khaza Anuarul Hoque, Otmane Aït Mohamed, Yvon Savaria, Claude Thibeault:
Early Analysis of Soft Error Effects for Aerospace Applications Using Probabilistic Model Checking. FTSCS 2013: 54-70 - [c159]Thibaut Stimpfling, Yvon Savaria, André Béliveau, Normand Bélanger, Omar Cherkaoui:
Optimal packet classification applicable tothe OpenFlow context. HPPN@HPDC 2013: 9-14 - [c158]Ahmed Lakhssassi, Roman Palenychka, Michel Sayde, Yvon Savaria, Marek B. Zaremba, Emmanuel Kengne:
A spatiotemporal attention operator for monitoring thermo-mechanical stress in wafer-scale integrated circuits using an infrared camera. ISPA 2013: 165-170 - [c157]Wasim Hussain, Yvon Savaria, Yves Blaquière:
An interface for the I2C protocol in the WaferBoard™. ISCAS 2013: 1492-1495 - [c156]Qifeng Gan, J. M. Pierre Langlois, Yvon Savaria:
A reformulated systematic resampling algorithm for particle filters and its parallel implementation in an application-specific instruction-set processor. MWSCAS 2013: 1415-1418 - [c155]Karim Baratli, Ahmed Lakhssassi, Yves Blaquière, Yvon Savaria:
A netlist pruning tool for an electronic system prototyping platform. NEWCAS 2013: 1-4 - [c154]R. Robache, Jean-François Boland, Claude Thibeault, Yvon Savaria:
A methodology for system-level fault injection based on gate-level faulty behavior. NEWCAS 2013: 1-4 - [c153]Abdelaziz Trabelsi, Yvon Savaria:
A 2D Gaussian smoothing kernel mapped to heterogeneous platforms. NEWCAS 2013: 1-4 - 2012
- [j61]Rudy Deca, Omar Cherkaoui, Yvon Savaria:
Rule-Based Network Service Provisioning. J. Networks 7(10): 1493-1504 (2012) - [j60]Saeid Hashemi, Mohamad Sawan, Yvon Savaria:
A High-Efficiency Low-Voltage CMOS Rectifier for Harvesting Energy in Implantable Devices. IEEE Trans. Biomed. Circuits Syst. 6(4): 326-335 (2012) - [j59]Gilbert Kowarzyk, N. Blanger, David Haccoun, Yvon Savaria:
Efficient Search Algorithm for Determining Optimal R=1/2 Systematic Convolutional Self-Doubly Orthogonal Codes. IEEE Trans. Commun. 60(1): 3-8 (2012) - [j58]Afshin Nourivand, Asim J. Al-Khalili, Yvon Savaria:
Postsilicon Tuning of Standby Supply Voltage in SRAMs to Reduce Yield Losses Due to Parametric Data-Retention Failures. IEEE Trans. Very Large Scale Integr. Syst. 20(1): 29-41 (2012) - [j57]Mame Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre:
Loop Acceleration Exploration for ASIP Architecture. IEEE Trans. Very Large Scale Integr. Syst. 20(4): 684-696 (2012) - [j56]P. Aubertin, J. M. Pierre Langlois, Yvon Savaria:
Real-Time Computation of Local Neighborhood Functions in Application-Specific Instruction-Set Processors. IEEE Trans. Very Large Scale Integr. Syst. 20(11): 2031-2043 (2012) - [c152]Romain Nishi, Guchuan Zhu, Yvon Savaria:
Optimal scheduling policy for AFDX End-Systems with virtual links of identical bandwidth allocation gap size. CCECE 2012: 1-4 - [c151]Zaid Al-bayati, Otmane Aït Mohamed, Syed Rafay Hasan, Yvon Savaria:
A novel hybrid FIFO asynchronous clock domain crossing interfacing method. ACM Great Lakes Symposium on VLSI 2012: 271-274 - [c150]Mathieu Allard, Patrick Grogan, Yvon Savaria, Jean-Pierre David:
Two-level configuration for FPGA: A new design methodology based on a computing fabric. ISCAS 2012: 265-268 - [c149]Omar Al-Terkawi Hasib, Walder Andre, Yves Blaquière, Yvon Savaria:
Propagating analog signals through a fully digital network on an electronic system prototyping platform. ISCAS 2012: 1983-1986 - [c148]Ghaith Bany Hamad, Otmane Aït Mohamed, Syed Rafay Hasan, Yvon Savaria:
Identification of soft error glitch-propagation paths: Leveraging SAT solvers. ISCAS 2012: 3258-3261 - [c147]Jean-François Pons, Jean-Jules Brault, Yvon Savaria:
State-holding free NULL Convention Logic™. MWSCAS 2012: 322-325 - [c146]Zaid Al-bayati, Otmane Aït Mohamed, Yvon Savaria, Mounir Boukadoum:
Probabilistic model checking of clock domain crossing interfaces. NEWCAS 2012: 193-196 - [c145]Jean-François Pons, Jean-Jules Brault, Yvon Savaria:
An FPGA compatible asynchronous wake-up receiver for Wireless Sensor Networks. NEWCAS 2012: 373-376 - [c144]Hai H. Nguyen, Mikael Guillemot, Yvon Savaria, Yves Blaquière:
A new approach for pin detection for an electronic system prototyping reconfigurable platform. RSP 2012: 122-127 - [c143]Amine Anane, El Mostapha Aboulhamid, Yvon Savaria:
System modeling and multicore simulation using transactions. ICSAMOS 2012: 41-50 - 2011
- [j55]Afshin Nourivand, Asim J. Al-Khalili, Yvon Savaria:
Analysis of Resistive Open Defects in Drowsy SRAM Cells. J. Electron. Test. 27(2): 203-213 (2011) - [j54]Syed Rafay Hasan, Normand Bélanger, Yvon Savaria, M. Omair Ahmad:
All digital skew tolerant synchronous interfacing methods for high-performance point-to-point communications in deep sub-micron SoCs. Integr. 44(1): 22-38 (2011) - [j53]Omar Al-Terkawi Hasib, Mohamad Sawan, Yvon Savaria:
A Low-Power Asynchronous Step-Down DC-DC Converter for Implantable Devices. IEEE Trans. Biomed. Circuits Syst. 5(3): 292-301 (2011) - [j52]Rahul Singh, Yves Audet, Yves Gagnon, Yvon Savaria, Étienne Boulais, Michel Meunier:
A Laser-Trimmed Rail-to-Rail Precision CMOS Operational Amplifier. IEEE Trans. Circuits Syst. II Express Briefs 58-II(2): 75-79 (2011) - [c142]Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria:
Repeater insertion in power-managed VLSI systems. ACM Great Lakes Symposium on VLSI 2011: 395-398 - [c141]Rana Farah, Qifeng Gan, J. M. Pierre Langlois, Guillaume-Alexandre Bilodeau, Yvon Savaria:
A tracking algorithm suitable for embedded systems implementation. ICECS 2011: 256-259 - [c140]Ghaith Bany Hamad, Otmane Aït Mohamed, Syed Rafay Hasan, Yvon Savaria:
SEGP-Finder: Tool for identification of Soft Error Glitch-Propagating paths at gate level. ICECS 2011: 358-361 - [c139]Shervin Vakili, Diana Carolina Gil, J. M. Pierre Langlois, Yvon Savaria, Guy Bois:
Customized embedded processor design for global photographic tone mapping. ICECS 2011: 382-385 - [c138]Houman Zarrabi, A. J. Al-Khalili, Yvon Savaria:
Activity management in battery-powered embedded systems: A case study of ZigBee® WSN. ICECS 2011: 727-731 - [c137]Gilbert Kowarzyk, Normand Bélanger, Yvon Savaria:
A GPGPU-based software implementation of the PBDI deinterlacing algorithm. ICECS 2011: 780-783 - [c136]Diana Carolina Gil, Rana Farah, J. M. Pierre Langlois, Guillaume-Alexandre Bilodeau, Yvon Savaria:
Comparative analysis of contrast enhancement algorithms in surveillance imaging. ISCAS 2011: 849-852 - 2010
- [j51]David Marche, Yvon Savaria:
Modeling R-2R Segmented-Ladder DACs. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(1): 31-43 (2010) - [j50]Syed Rafay Hasan, Normand Bélanger, Yvon Savaria, M. Omair Ahmad:
Crosstalk Glitch Propagation Modeling for Asynchronous Interfaces in Globally Asynchronous Locally Synchronous Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 2020-2031 (2010) - [j49]Syed Rafay Hasan, Normand Bélanger, Yvon Savaria, M. Omair Ahmad:
Crosstalk-Glitch Gating: A Solution for Designing Glitch-Tolerant Asynchronous Handshake Interface Mechanisms for GALS Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(10): 2696-2707 (2010) - [c135]Mohammed Bougataya, Oussama Berriah, Ahmed Lakhssassi, Adel-Omar Dahmane, Yves Blaquière, Yvon Savaria, Richard Norman, Richard Prytula:
Thermo-mechanical analysis of a reconfigurable wafer-scale integrated circuit. ICECS 2010: 315-318 - [c134]Olivier Valorge, Yves Blaquière, Yvon Savaria:
A spatially reconfigurable fast differential interface for a wafer scale configurable platform. ICECS 2010: 1176-1179 - [c133]Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria:
An interconnect-aware Dynamic Voltage Scaling scheme for DSM VLSI. ISCAS 2010: 41-44 - [c132]Omar Al-Terkawi Hasib, Mohamad Sawan, Yvon Savaria:
Fully integrated ultra-low-power asynchronously driven step-down DC-DC converter. ISCAS 2010: 877-880
2000 – 2009
- 2009
- [j48]Ali Naderi, Mohamad Sawan, Yvon Savaria:
A low-power 2GHz data conversion using delta modulation for portable application. Integr. 42(1): 68-76 (2009) - [j47]Louis-François Tanguay, Mohamad Sawan, Yvon Savaria:
A very-high output impedance charge pump for low-voltage low-power PLLs. Microelectron. J. 40(6): 1026-1031 (2009) - [j46]Saeid Hashemi, Mohamad Sawan, Yvon Savaria:
A novel low-drop CMOS active rectifier for RF-powered devices: Experimental results. Microelectron. J. 40(11): 1547-1554 (2009) - [j45]David Marche, Yvon Savaria, Yves Gagnon:
An Improved Switch Compensation Technique for Inverted R-2R Ladder DACs. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(6): 1115-1124 (2009) - [j44]Patrick Mahoney, Yvon Savaria, Guy Bois, Patrice Plante:
Performance Characterization for the Implementation of Content Addressable Memories Based on Parallel Hashing Memories. Trans. High Perform. Embed. Archit. Compil. 2: 307-325 (2009) - [j43]Nicolas Beucher, Normand Bélanger, Yvon Savaria, Guy Bois:
High Acceleration for Video Processing Applications Using Specialized Instruction Set Based on Parallelism and Data Reuse. J. Signal Process. Syst. 56(2-3): 155-165 (2009) - [c131]Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria:
An interconnect-aware delay model for dynamic voltage scaling in NM technologies. ACM Great Lakes Symposium on VLSI 2009: 45-50 - [c130]Saeid Hashemi, Mohamad Sawan, Yvon Savaria:
A low-area power-efficient CMOS active rectifier for wirelessly powered medical devices. ICECS 2009: 635-638 - [c129]Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria:
Estimation of energy performance in computing platforms. ICECS 2009: 783-786 - [c128]Etienne Lepercq, Yves Blaquière, Richard Norman, Yvon Savaria:
Workflow for an Electronic Configurable Prototyping System. ISCAS 2009: 2005-2008 - [c127]Syed Rafay Hasan, Bill Pontikakis, Yvon Savaria:
An All-digital Skew-adaptive Clock Scheduling Algorithm for Heterogeneous Multiprocessor Systems on Chips (MPSoCs). ISCAS 2009: 2501-2504 - 2008
- [j42]Hung Tien Bui, Yvon Savaria:
Design of a High-Speed Differential Frequency-to-Voltage Converter and Its Application in a 5-GHz Frequency-Locked Loop. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(3): 766-774 (2008) - [j41]David Marche, Yvon Savaria, Yves Gagnon:
Laser Fine-Tuneable Deep-Submicrometer CMOS 14-bit DAC. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(8): 2157-2165 (2008) - [j40]Ali Naderi, Mohamad Sawan, Yvon Savaria:
On the Design of Undersampling Continuous-Time Bandpass Delta-Sigma Modulators for Gigahertz Frequency A/D Conversion. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(11): 3488-3499 (2008) - [j39]Max-Elie Salomon, Badre Izouggaghen, Abdelhakim Khouas, Yvon Savaria:
Spur Model for a Fixed-Frequency Signal Subject to Periodic Jitter. IEEE Trans. Instrum. Meas. 57(10): 2320-2328 (2008) - [j38]Wayne Luk, Yvon Savaria, Oskar Mencer:
Guest Editorial: 20 Years of ASAP. J. Signal Process. Syst. 53(1-2): 1-2 (2008) - [c126]Louis-François Tanguay, Mohamad Sawan, Yvon Savaria:
A very-high output impedance current mirror for very-low voltage biomedical analog circuits. APCCAS 2008 - [c125]Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre:
Loop-oriented metrics for exploring an application-specific architecture design-space. ASAP 2008: 257-262 - [c124]Olivier Valorge, Anh Tuan Nguyen, Yves Blaquière, Richard Norman, Yvon Savaria:
Digital signal propagation on a wafer-scale smart active programmable interconnect. ICECS 2008: 1059-1062 - [c123]Yan Basile-Bellavance, Etienne Lepercq, Yves Blaquière, Yvon Savaria:
Hardware/software system co-verification of an active reconfigurable board with SystemC-VHDL. ICECS 2008: 1159-1162 - [c122]Amine Anane, El Mostapha Aboulhamid, Julie Vachon, Yvon Savaria:
Modeling and simulation of complex heterogeneous systems. ISCAS 2008: 2873-2876 - 2007
- [j37]Rudy Deca, Omar Cherkaoui, Yvon Savaria, Doug Slone:
Constraint-based model for network service provisioning. Ann. des Télécommunications 62(7-8): 847-870 (2007) - [j36]Nicolas Gorse, P. Bélanger, Alexandre Chureau, El Mostapha Aboulhamid, Yvon Savaria:
A high-level requirements engineering methodology for electronic system-level design. Comput. Electr. Eng. 33(4): 249-268 (2007) - [j35]Hossein Mahvash Mohammadi, J. M. Pierre Langlois, Yvon Savaria:
A Five-Field Motion Compensated Deinterlacing Method Based on Vertical Motion. IEEE Trans. Consumer Electron. 53(3): 1117-1124 (2007) - [j34]Mame Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre:
A Novel Application-specific Instruction-set Processor Design Approach for Video Processing Acceleration. J. VLSI Signal Process. 47(3): 297-315 (2007) - [c121]Yves Blaquière, Yvon Savaria, Jaouad El Fouladi:
Digital Measurement Technique for Capacitance Variation Detection on Integrated Circuit I/Os. ICECS 2007: 42-45 - [c120]Abdessatar Abderrahman, Mohamad Sawan, Yvon Savaria, Abdelhakim Khouas:
New Analog Test Metrics Based on Probabilistic and Deterministic Combination Approaches. ICECS 2007: 82-85 - [c119]Nicolas Beucher, Normand Bélanger, Yvon Savaria, Guy Bois:
A Methodology to Evaluate the Energy Efficiency of Application Specific Processors. ICECS 2007: 983-986 - [c118]Karim Hadjiat, Francis St-Pierre, Guy Bois, Yvon Savaria, Michel Langevin, Pierre G. Paulin:
An FPGA Implementation of a Scalable Network-on-Chip Based on the Token Ring Concept. ICECS 2007: 995-998 - [c117]Olivier Valorge, David Marche, Alain Lacourse, Mohamad Sawan, Yvon Savaria:
Signal Integrity Analysis of a High Precision D/A Converter. ICECS 2007: 1224-1227 - [c116]Abdelaziz Trabelsi, François-Raymond Boyer, Yvon Savaria, Mounir Boukadoum:
Iterative Noise-Compensated Method to Improve LPC Based Speech Analysis. ICECS 2007: 1364-1367 - [c115]Vincent Binet, Yvon Savaria, Michel Meunier, Yves Gagnon:
Modeling the Substrate Noise Injected by a DC-DC Converter. ISCAS 2007: 309-312 - [c114]Syed Rafay Hasan, Yvon Savaria:
Crosstalk Effects in Event-Driven Self-Timed Circuits Designed With 90nm CMOS Technology. ISCAS 2007: 629-632 - [c113]Bill Pontikakis, Hung Tien Bui, François R. Boyer, Yvon Savaria:
A Low-Complexity High-Speed Clock Generator for Dynamic Frequency Scaling of FPGA and Standard-Cell Based Designs. ISCAS 2007: 633-636 - [c112]Rahul Singh, Yves Audet, Yves Gagnon, Yvon Savaria:
Integrated Circuit Trimming Technique for Offset Reduction in a Precision CMOS Amplifier. ISCAS 2007: 709-712 - [c111]Robert Chebli, Mohamad Sawan, Yvon Savaria, Kamal El-Sankary:
High-Voltage DMOS Integrated Circuits with Floating Gate Protection Technique. ISCAS 2007: 3343-3346 - 2006
- [j33]Marc-André Cantin, Yvon Savaria, D. Prodanos, Pierre Lavoie:
A Metric for Automatic Word-Length Determination of Hardware Datapaths. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 2228-2231 (2006) - [c110]Ali Naderi, Mohamad Sawan, Yvon Savaria:
Design of an Active-RC Bandpass Filter for a Subsampling RF Delta Modulator. CCECE 2006: 967-970 - [c109]N. Ignat, Bogdan Nicolescu, Yvon Savaria, Gabriela Nicolescu:
Soft-error classification and impact analysis on real-time operating systems. DATE 2006: 182-187 - [c108]Abdelaziz Ammari, Régis Leveugle, Bogdan Nicolescu, Yvon Savaria:
Evaluation of a Software-Based Error Detection Technique by RT-Level Fault Injection. DELTA 2006: 488-493 - [c107]Hung Tien Bui, Yvon Savaria:
High speed differential pulse-width control loop based on frequency-to-voltage converters. ACM Great Lakes Symposium on VLSI 2006: 53-56 - [c106]Hossein Mahvash Mohammadi, J. M. Pierre Langlois, Yvon Savaria:
A Threshold-Based Deinterlacing Algorithm Using Motion Compensation and Directional Interpolation. ICECS 2006: 459-462 - [c105]Ami Castonguay, Yvon Savaria:
Architecture of a hypertransport tunnel. ISCAS 2006 - [c104]Saeid Hashemi, Mohamad Sawan, Yvon Savaria:
A power planning model for implantable stimulators. ISCAS 2006 - [c103]Z. Huang, Yvon Savaria, Mohamad Sawan, R. Meinga:
High-voltage operational amplifier based on dual floating-gate transistors. ISCAS 2006 - [c102]Maria Mbaye, D. Lebel, Normand Bélanger, Yvon Savaria, Samuel Pierre:
Design exploration with an application-specific instruction-set processor for ELA deinterlacing. ISCAS 2006 - [c101]Ali Naderi, Mohamad Sawan, Yvon Savaria:
A novel 2-GHz band-pass delta modulator dedicated to wireless receivers. ISCAS 2006 - [c100]Bill Pontikakis, François R. Boyer, Yvon Savaria:
A 0.8V algorithmically defined buffer and ring oscillator low-energy design for nanometer SoCs. ISCAS 2006 - [c99]Houman Zarrabi, Haydar Saaied, Asim J. Al-Khalili, Yvon Savaria:
Zero skew differential clock distribution network. ISCAS 2006 - [c98]S. Torrellas, Bogdan Nicolescu, Raul Velazco, Mario García-Valderas, Yvon Savaria:
Validation by Fault Injection of a Software Error Detection Technique Dealing with Critical Single Event Upsets. LATW 2006: 111-116 - [c97]Nicolas Beucher, Normand Bélanger, Yvon Savaria, Guy Bois:
Motion Compensated Frame Rate Conversion Using a Specialized Instruction Set Processor. SiPS 2006: 130-135 - 2005
- [j32]Hakim Khali, Yvon Savaria, Jean-Louis Houle:
A system level implementation strategy and partitioning heuristic for LUT-based applications. Comput. Electr. Eng. 31(7): 485-502 (2005) - [j31]Noureddine Chabini, El Mostapha Aboulhamid, Ismaïl Chabini, Yvon Savaria:
Scheduling and optimal register placement for synchronous circuits derived using software pipelining techniques. ACM Trans. Design Autom. Electr. Syst. 10(2): 187-204 (2005) - [c96]Alexandre Chureau, Yvon Savaria, El Mostapha Aboulhamid:
The Role of Model-Level Transactors and UML in Functional Prototyping of Systems-on-Chip: A Software-Radio Application. DATE 2005: 698-703 - [c95]Robert Chebli, Mohamad Sawan, Yvon Savaria:
Gate oxide protection in HV CMOS/DMOS integrated circuits: Design and experimental results. ICECS 2005: 1-4 - [c94]Saeid Hashemi, Mohamad Sawan, Yvon Savaria:
Modeling power budget requirements of implantable electronic devices. ICECS 2005: 1-4 - [c93]David Marche, Yves Gagnon, Yvon Savaria:
. A new switch compensation technique for inverted R-2R ladder DACs. ISCAS (1) 2005: 196-199 - [c92]H. G. Epassa, François R. Boyer, Yvon Savaria:
Implementation of a cycle by cycle variable speed processor. ISCAS (4) 2005: 3335-3338 - [c91]Alexandre Landry, Mohamed Nekili, Yvon Savaria:
A novel 2 GHz multi-layer AMBA high-speed bus interconnect matrix for SoC platforms. ISCAS (4) 2005: 3343-3346 - [c90]S. Catudal, Marc-André Cantin, Yvon Savaria:
Parameters estimation applied to automatic video processing algorithms validation. ISCAS (4) 2005: 3439-3442 - [c89]Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre:
Application specific instruction-set processor generation for video processing based on loop optimization. ISCAS (4) 2005: 3515-3518 - [c88]G. Wild, Yvon Savaria, Michel Meunier:
Characterization of laser-induced photoexcitation effect on a surrounding CMOS ring oscillator. ISCAS (4) 2005: 3696-3699 - [c87]G. Provost, Marc-André Cantin, Mohamad Sawan, Christian Cardinal, Yvon Savaria, David Haccoun:
Fast parameters optimization of an iterative decoder using a configurable hardware accelerator. ISCAS (4) 2005: 4159-4162 - [c86]Simon Rioux, Alain Lacourse, Yvon Savaria, Michel Meunier:
Design methods for CMOS low-current finely tunable voltage references covering a wide output range. ISCAS (5) 2005: 4257-4260 - [c85]Max-Elie Salomon, Abdelhakim Khouas, Yvon Savaria:
A complete spurs distribution model for direct digital period synthesizers. ISCAS (5) 2005: 4859-4862 - [c84]Dinh Hung Dang, Yvon Savaria, Mohamad Sawan:
A novel approach for implementing ultra-high speed flash ADC using MCML circuits. ISCAS (6) 2005: 6158-6161 - [c83]Wei Ling, Yvon Savaria:
Analysis of Wave-Pipelined Domino Logic Circuit and Clocking Styles Subject to Parametric Variations. ISQED 2005: 688-693 - [c82]Robert Grou-Szabo, Hany Ghattas, Yvon Savaria, Gabriela Nicolescu:
Component-Based Methodology for Hardware Design of a Dataflow Processing Network. IWSOC 2005: 289-294 - [c81]Bill Pontikakis, François R. Boyer, Yvon Savaria:
Performance Improvement of Configurable Processor Architectures Using a Variable Clock Period. IWSOC 2005: 454-458 - [c80]Hung Tien Bui, Yvon Savaria:
A Generic Method for Embedded Measurement and Compensation of Process and Temperature Variations in SoCs. IWSOC 2005: 557-562 - [c79]Ami Castonguay, Yvon Savaria:
A HyperTransport Chip-to-Chip Interconnect Tunnel Developed Using SystemC. IEEE International Workshop on Rapid System Prototyping 2005: 264-266 - 2004
- [j30]Marc-André Cantin, S. Regimbal, S. Catudal, Yvon Savaria:
A Unified Environment to Assess Image Quality in Video Processing. J. Circuits Syst. Comput. 13(6): 1289-1306 (2004) - [c78]Olivier Duval, L.-P. Lafrance, Yvon Savaria, Patrick Desjardins:
An Integrated Test Platform for Nanostructure Electrical Characterization. ICMENS 2004: 237-242 - [c77]Mohammed Layachi, Yvon Savaria, Alain Rochefort:
The Effect of p-Coupling on the Electronic Properties of 1, 4-Dithiol Benzene Stacking. ICMENS 2004: 588-592 - [c76]Bogdan Nicolescu, Yvon Savaria, Raoul Velazco:
Performance Evaluation and Failure Rate Prediction for the Soft Implemented Error Detection Technique. IOLTS 2004: 233-238 - [c75]Hung Tien Bui, Yvon Savaria:
Shunt-peaking in MCML gates and its application in the design of a 20 Gb/s half-rate phase detector. ISCAS (4) 2004: 369-372 - [c74]Badre Izouggaghen, Abdelhakim Khouas, Yvon Savaria:
Spurs modeling in direct digital period synthesizers related to phase accumulator truncation. ISCAS (3) 2004: 389-392 - [c73]Dorin Emil Calbaza, Ioan Cordos, Nigel Seth-Smith, Yvon Savaria:
An ADPLL circuit using a DDPS for genlock applications. ISCAS (4) 2004: 569-572 - [c72]Kevin Peterson, Yvon Savaria:
Assertion-based on-line verification and debug environment for complex hardware systems. ISCAS (2) 2004: 685-688 - [c71]Olivier Duval, Yvon Savaria:
An on-chip delay measurements module for nanostructures characterization. ISCAS (3) 2004: 721-724 - [c70]Alexandre Chureau, Yvon Savaria, El Mostapha Aboulhamid:
Interface-based Design of Systems-on-Chip using UML-RT. IWSOC 2004: 39-44 - [c69]L.-P. Lafrance, Yvon Savaria:
A Framework for Implementing Reusable Digital Signal Processing Modules. IWSOC 2004: 51-54 - [c68]S. Regimbal, Yvon Savaria, Guy Bois:
Verification Strategy Determination Using Dependence Analysis of Transaction-Level Models. IWSOC 2004: 87-92 - [c67]D. Morin, Frédéric Normandin, Marie-Eve Grandmaison, H. Dang, Yvon Savaria, Mohamad Sawan:
An Intellectual Property Module for Auto-Calibration of Time-Interleaved Pipelined Analog-to-Digital Converters. IWSOC 2004: 111-114 - [c66]Hung Tien Bui, Yvon Savaria:
10 GHz PLL Using Active Shunt-Peaked MCML Gates and Improved Frequency Acquisition XOR Phase Detector in 0.18 µm CMOS. IWSOC 2004: 115-118 - [c65]Pascal Nsame, Yvon Savaria:
A Customizable Embedded SoC Platform Architecture. IWSOC 2004: 299-304 - [c64]Pascal Nsame, Yvon Savaria:
Multi-processor SoC integration: a case study on BlueGene/L. SoCC 2004: 201-204 - 2003
- [j29]Eric Granger, Yvon Savaria, Pierre Lavoie:
A Pattern Reordering Approach Based on Ambiguity Detection for Online Category Learning. IEEE Trans. Pattern Anal. Mach. Intell. 25(4): 524-528 (2003) - [j28]Noureddine Chabini, Ismaïl Chabini, El Mostapha Aboulhamid, Yvon Savaria:
Methods for minimizing dynamic power consumption in synchronous designs with multiple supply voltages. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(3): 346-351 (2003) - [j27]Hakim Khali, Yvon Savaria, Jean-Louis Houle, Marc Rioux, J.-Angelo Beraldin, D. Poussart:
Improvement of sensor accuracy in the case of a variable surface reflectance gradient for active laser range finders. IEEE Trans. Instrum. Meas. 52(6): 1799-1808 (2003) - [c63]Meng Lu, Yvon Savaria, Bing Qiu, Jacques Taillefer:
IEEE 1149.1 Based Defect and Fault Tolerant Scan Chain for Wafer Scale Integration. DFT 2003: 18-25 - [c62]Bogdan Nicolescu, Paul Peronnard, Raoul Velazco, Yvon Savaria:
Efficiency of Transient Bit-Flips Detection by Software Means: A Complete Study. DFT 2003: 377-384 - [c61]Bogdan Nicolescu, Yvon Savaria, Raoul Velazco:
SIED: Software Implemented Error Detection. DFT 2003: 589-596 - [c60]Noureddine Chabini, Ismaïl Chabini, El Mostapha Aboulhamid, Yvon Savaria:
Unification of basic retiming and supply voltage scaling to minimize dynamic power consumption for synchronous digital designs. ACM Great Lakes Symposium on VLSI 2003: 221-224 - [c59]Hakim Khali, Yvon Savaria:
A hardware-software co-design model for real-time 3D image computation using active laser range finders: a case study. ICECS 2003: 854-857 - [c58]Mathieu Renaud, Yvon Savaria:
A CMOS three-state frequency detector complementary to an enhanced linear phase detector for PLL, DLL or high frequency clock skew measurement. ISCAS (3) 2003: 148-151 - [c57]Yiyan Tang, Lie Qian, Yuke Wang, Yvon Savaria:
A new memory reference reduction method for FFT implementation on DSP. ISCAS (4) 2003: 496-499 - [c56]Hany Ghattas, M. Mbaye, J. Pepga Bissou, Yvon Savaria:
SoC platform architecture for a network processor. SoC 2003: 49-52 - [c55]S. Regimbal, Jean-Francois Lemire, Yvon Savaria, Guy Bois, El Mostapha Aboulhamid, A. Baron:
Automating Functional Coverage Analysis Based on an Executable Specification. IWSOC 2003: 228-234 - 2002
- [j26]Dorin Emil Calbaza, Yvon Savaria:
A direct digital period synthesis circuit. IEEE J. Solid State Circuits 37(8): 1039-1045 (2002) - [j25]Zhong-Fang Jin, Jean-Jacques Laurin, Yvon Savaria:
A practical approach to model long MIS interconnects in VLSI circuits. IEEE Trans. Very Large Scale Integr. Syst. 10(4): 494-507 (2002) - [c54]Bing Qiu, Yvon Savaria, Meng Lu, Chunyan Wang, Claude Thibeault:
Yield Modeling of a WSI Telecom Router Architecture. DFT 2002: 314-324 - [c53]J. Dido, N. Géraudie, L. Loiseau, O. Payeur, Yvon Savaria, D. Poirier:
A flexible floating-point format for optimizing data-paths and operators in FPGA based DSPs. FPGA 2002: 50-55 - [c52]Youcef Fouzar, Yvon Savaria, Mohamad Sawan:
A CMOS phase-locked loop with an auto-calibrated VCO. ISCAS (3) 2002: 177-180 - [c51]A. Bendali, Yvon Savaria:
Low-voltage bandgap reference with temperature compensation based on a threshold voltage technique. ISCAS (3) 2002: 201-204 - [c50]Mathieu Renaud, Yvon Savaria:
A linear phase detector for arbitrary clock signals. ISCAS (4) 2002: 775-778 - [c49]L.-P. Lafrance, Marc-André Cantin, Yvon Savaria, S. H. Sung, Pierre Lavoie:
Architecture and performance characterization of hardware and software implementations of the Crozier frequency estimation algorithm. ISCAS (4) 2002: 823-826 - [c48]Hakim Khali, Yvon Savaria:
FPGA Implementation of a Sub-pixel Correction Algorithm for Active Laser Range Finders. MVA 2002: 604-606 - 2001
- [j24]Dorin Emil Calbaza, Yvon Savaria:
Direct digital frequency synthesis of low-jitter clocks. IEEE J. Solid State Circuits 36(3): 570-572 (2001) - [j23]François R. Boyer, El Mostapha Aboulhamid, Yvon Savaria, Michel Boyer:
Optimal design of synchronous circuits using software pipelining techniques. ACM Trans. Design Autom. Electr. Syst. 6(4): 516-532 (2001) - [c47]Noureddine Chabini, El Mostapha Aboulhamid, Yvon Savaria:
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages. ICCD 2001: 546-552 - [c46]Lévis Thériault, Daniel Audet, Yvon Savaria:
Performance estimators for hardware/software co-design. ISCAS (5) 2001: 17-20 - [c45]Marc-André Cantin, Yvon Savaria, D. Prodanos, Pierre Lavoie:
An automatic word length determination method. ISCAS (5) 2001: 53-56 - [c44]Mohamed Nekili, Yvon Savaria, Guy Bois:
Minimizing process-induced skew using delay tuning. ISCAS (4) 2001: 426-429 - [c43]Youcef Fouzar, Yvon Savaria, Mohamad Sawan:
A new controlled gain phase-locked loop technique. ISCAS (4) 2001: 810-813 - [c42]Noureddine Chabini, Yvon Savaria:
Methods for optimizing register placement in synchronous circuits derived using software pipelining techniques. ISSS 2001: 209-214 - [c41]Ginette Monté, Bernard Antaki, Serge Patenaude, Yvon Savaria, Claude Thibeault, Pieter M. Trouborst:
Tools for the Characterization of Bipolar CML Testability. VTS 2001: 388-395 - 2000
- [c40]Dorin Emil Calbaza, Yvon Savaria:
Direct digital frequency synthesis of low-jitter clocks. CICC 2000: 31-34 - [c39]Olivier Hébert, Ivan C. Kraljic, Yvon Savaria:
A method to derive application-specific embedded processing cores. CODES 2000: 88-92 - [c38]Youcef Fouzar, Mohamad Sawan, Yvon Savaria:
Very short locking time PLL based on controlled gain technique. ICECS 2000: 252-255 - [c37]François-Raymond Boyer, El Mostapha Aboulhamid, Yvon Savaria:
An efficient verification method for a class of multi-phase sequential circuits. ICECS 2000: 510-515 - [c36]Marc-André Cantin, Yves Blaquière, Yvon Savaria, Pierre Lavoie, Eric Granger:
Analysis of quantization effects in a digital hardware implementation of a fuzzy ART neural network algorithm. ISCAS 2000: 141-144 - [c35]Youcef Fouzar, Mohamad Sawan, Yvon Savaria:
A new fully integrated CMOS phase-locked loop with low jitter and fast lock time. ISCAS 2000: 253-256 - [c34]Patrice Vado, Yvon Savaria, Yannick Zoccarato, Chantal Robach:
A methodology for validating digital circuits with mutation testing. ISCAS 2000: 343-346
1990 – 1999
- 1999
- [j22]Mohamed Nekili, Yvon Savaria, Guy Bois:
Spatial characterization of process variations via MOS transistor time constants in VLSI and WSI. IEEE J. Solid State Circuits 34(1): 80-84 (1999) - [j21]Pierre Lavoie, Jean-François Crespo, Yvon Savaria:
Generalization, discrimination, and multiple categorization using adaptive resonance theory. IEEE Trans. Neural Networks 10(4): 757-767 (1999) - [j20]B. Bosi, Guy Bois, Yvon Savaria:
Reconfigurable pipelined 2-D convolvers for fast digital signal processing. IEEE Trans. Very Large Scale Integr. Syst. 7(3): 299-308 (1999) - [c33]Bernard Antaki, Yvon Savaria, Nanhan Xiong, Saman Adham:
Design For Testability Method for CML Digital Circuits. DATE 1999: 360-367 - [c32]Cynthia Cousineau, François Laperle, Yvon Savaria:
Design of a JTAG Based Run Time Reconfigurable System. FCCM 1999: 268-269 - [c31]Dorin Emil Calbaza, Yvon Savaria:
Jitter model of direct digital synthesis clock generators. ISCAS (1) 1999: 1-4 - [c30]Zhong-Fang Jin, Jean-Jacques Laurin, Yvon Savaria, Pierre Garon:
A new approach to analyze interconnect delays in RC wire models. ISCAS (6) 1999: 246-249 - [c29]B. Le Chapelain, A. Mechain, Yvon Savaria, Guy Bois:
Development of a high performance TSPC library for implementation of large digital building blocks. ISCAS (1) 1999: 443-446 - 1998
- [j19]Eric Granger, Yvon Savaria, Pierre Lavoie, Marc-André Cantin:
A comparison of self-organizing neural networks for fast clustering of radar pulses. Signal Process. 64(3): 249-269 (1998) - [c28]Daniel Audet, Steve Masson, Yvon Savaria:
Reducing Fault Sensitivity of Microprocessor-Based Systems by Modifying Workload Structure. DFT 1998: 241- - [c27]Pascal Poiré, Marc-André Cantin, Hervé Daniel, Yves Blaquière, Yvon Savaria:
A Comparative Analysis of Fuzzy ART Neural Network Implementations: The Advantages of Reconfigurable Computing. FCCM 1998: 304-305 - [c26]Mohamed Nekili, Yvon Savaria, Guy Bois:
Design of Clock Distribution Networks in Presence of Process Variations. Great Lakes Symposium on VLSI 1998: 95-102 - [c25]François R. Boyer, El Mostapha Aboulhamid, Yvon Savaria, Imed Eddine Bennour:
Optimal design of synchronous circuits using software pipelining techniques. ICCD 1998: 62-67 - [c24]Paul Marriott, Ivan C. Kraljic, Yvon Savaria:
Parallel ultra large scale engine SIMD architecture for real-time digital signal processing applications. ICCD 1998: 482-487 - 1997
- [j18]Mohamed Nekili, Guy Bois, Yvon Savaria:
Pipelined H-trees for high-speed clocking of large integrated systems in presence of process variations. IEEE Trans. Very Large Scale Integr. Syst. 5(2): 161-174 (1997) - [c23]Michel Kafrouni, Claude Thibeault, Yvon Savaria:
A Cost Model for VLSI / MCM Systems. DFT 1997: 148-156 - [c22]Yves Gagnon, Yvon Savaria, Michel Meunier, Claude Thibeault:
Are defect-tolerant circuits with redundancy really cost-effective? Complete and realistic cost model. DFT 1997: 157-165 - [c21]Pierre Lavoie, Jean-François Crespo, Yvon Savaria:
Multiple categorization using fuzzy ART. ICNN 1997: 1983-1988 - 1996
- [j17]Yervant Zorian, Tom Anderson, Yvon Savaria, Claude Thibeault, André Ivanov:
Panel Summaries. IEEE Des. Test Comput. 13(3): 6, 110-112 (1996) - [j16]Adel Belhaouane, Yvon Savaria, Bozena Kaminska, Daniel Massicotte:
Reconstruction method for jitter tolerant data acquisition system. J. Electron. Test. 9(1-2): 177-185 (1996) - [j15]Yves Blaquière, Michel R. Dagenais, Yvon Savaria:
Timing analysis speed-up using a hierarchical and a multimode approach. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(2): 244-255 (1996) - [c20]Daniel Audet, N. Gagnon, Yvon Savaria:
Implementing Fault Injection and Tolerance Mechanisms in Multiprocessor Systems. DFT 1996: 310-317 - [c19]Mohamed Soufi, Steve Rochon, Yvon Savaria, Bozena Kaminska:
Design and performance of CMOS TSPC cells for high speed pseudo random testing. VTS 1996: 368-373 - 1995
- [j14]Claude Thibeault, Yvon Savaria, Jean-Louis Houle:
Equivalence Proofs of Some Yield Modeling Methods for Defect-Tolerant Integrated Circuits. IEEE Trans. Computers 44(5): 724-728 (1995) - [j13]Mohamed Soufi, Yvon Savaria, F. Darlay, Bozena Kaminska:
Producing Reliable Initialization and Test of Sequential Circuits with Pseudorandom Vectors. IEEE Trans. Computers 44(10): 1251-1256 (1995) - [j12]Jean Belzile, Yvon Savaria, David Haccoun, Martin Chalifoux:
Bounds on the performance of partial selection networks. IEEE Trans. Commun. 43(2/3/4): 1800-1809 (1995) - [c18]Janusz Rzeszut, Bozena Kaminska, Yvon Savaria:
A new method for testing mixed analog and digital circuits. Asian Test Symposium 1995: 127-132 - [c17]Yves Blaquière, Gabriel Gagné, Yvon Savaria, Claude Évéquoz:
Cost analysis of a new algorithmic-based soft-error tolerant architecture. DFT 1995: 189-197 - [c16]Mohamed Soufi, Yvon Savaria, Bozena Kaminska:
On Using Partial Reset for Pseudo-Random Testing. ISCAS 1995: 949-952 - [c15]Mohamed Soufi, Yvon Savaria, Bozena Kaminska:
On the design of at-speed testable VLSI circuits. VTS 1995: 290-295 - 1994
- [j11]Claude Thibeault, Yvon Savaria, Jean-Louis Houle:
A Fast Method to Evaluate the Optimum Number of Spares in Defect-Tolerant Integrated Circuits. IEEE Trans. Computers 43(6): 687-698 (1994) - [j10]Pierre Lavoie, David Haccoun, Yvon Savaria:
A systolic architecture for fast stack sequential decoders. IEEE Trans. Commun. 42(234): 324-335 (1994) - [j9]Normand Bélanger, David Haccoun, Yvon Savaria:
A multiprocessor architecture for multiple path stack sequential decoders. IEEE Trans. Commun. 42(234): 951-957 (1994) - [j8]Daniel Audet, Yvon Savaria, N. Arel:
Pipelining communications in large VLSI/ULSI systems. IEEE Trans. Very Large Scale Integr. Syst. 2(1): 1-10 (1994) - [c14]Rachid Kermouche, Yvon Savaria:
Defect and Fault Tolerant Scan Chains. DFT 1994: 185-193 - [c13]Abdessatar Abderrahman, Bozena Kaminska, Yvon Savaria:
Estimation of Simultaneous Switching Power and Ground Noise of Static CMOS Combinational Circuits. EDAC-ETC-EUROASIC 1994: 658 - [c12]Naim Ben-Hamida, Bozena Kaminska, Yvon Savaria:
Pseudo-Random Vector Compaction for Sequential Testability. ISCAS 1994: 63-66 - [c11]Jean-François Crespo, Pierre Lavoie, Yvon Savaria:
Fast Convergence with Low Precision Weights in ART1 Networks. ISCAS 1994: 237-240 - [c10]Mohamed Nekili, Yvon Savaria, Guy Bois:
A Fast Low-Power Driver for Long Interconnections in VLSI Systems. ISCAS 1994: 343-346 - [c9]Sameh Ghannoum, Dmitri Chtchvyrkov, Yvon Savaria:
A Comparative Study of Single-Phase Clocked Latches Using Estimation Criteria. ISCAS 1994: 347-350 - [c8]Yvon Savaria, Dmitri Chtchvyrkov, John F. Currie:
A Fast CMOS Voltage-Controlled Ring Oscillator. ISCAS 1994: 359-362 - 1993
- [c7]J. Crépeau, Claude Thibeault, Yvon Savaria:
Some Results on Yield and Local Design Rule Relaxation. DFT 1993: 144-151 - [c6]Naim Ben-Hamida, Bozena Kaminska, Yvon Savaria:
Initiability: A Measure of Sequential Testability. ISCAS 1993: 1619-1622 - [c5]Hakim Khali, Jean-Louis Houle, Yvon Savaria:
A High Speed Parallel Structure for the Basic Wavelet Transform Algorithm. ISCAS 1993: 1971-1974 - [c4]Mohamed Nekili, Yvon Savaria:
Parallel Regeneration of Interconnections in VLSI & ULSI Circuits. ISCAS 1993: 2023-2026 - [e1]Fabrizio Lombardi, Mariagiovanna Sami, Yvon Savaria, Renato Stefanelli:
The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, October 27-29, 1993, Venice, Italy, Proceedings. IEEE Computer Society 1993, ISBN 0-8186-3502-9 [contents] - 1992
- [j7]Claude Thibeault, Yvon Savaria, Jean-Louis Houle:
Test quality of hierarchical defect-tolerant integrated circuits. J. Electron. Test. 3(1): 93-102 (1992) - [j6]Claude Thibeault, Yvon Savaria, Jean-Louis Houle:
Heuristic Prediction of the Optimum Number of spares in Defect-Tolerant Integrated Circuits. J. Circuits Syst. Comput. 2(2): 81-100 (1992) - [j5]Daniel Audet, Yvon Savaria, Jean-Louis Houle:
Performance improvements to VLSI parallel systems, using dynamic concatenation of processing resources. Parallel Comput. 18(2): 149-167 (1992) - 1991
- [j4]Pierre Lavoie, David Haccoun, Yvon Savaria:
New VLSI architectures for fast soft-decision threshold decoders. IEEE Trans. Commun. 39(2): 200-207 (1991)
1980 – 1989
- 1989
- [c3]Yvon Savaria, Bruno Laguë, Bozena Kaminska:
A Pragmatic Approach to the Design of Self-Testing Circuits. ITC 1989: 745-754 - [c2]Bozena Kaminska, Yvon Savaria:
Design-for-Testability Using Test Design Yield and Decision Theory. ITC 1989: 884-892 - 1988
- [j3]David Haccoun, Pierre Lavoie, Yvon Savaria:
New architectures for fast convolutional encoders and threshold decoders. IEEE J. Sel. Areas Commun. 6(3): 457 (1988) - 1986
- [j2]Yvon Savaria, Jeremiah F. Hayes, Nicholas C. Rumin, Vinod K. Agarwal:
A Theory for the Design of Soft-Error-Tolerant VLSI Circuits. IEEE J. Sel. Areas Commun. 4(1): 15-23 (1986) - [j1]Yvon Savaria, Nicholas C. Rumin, Jeremiah F. Hayes, Vinold K. Agarwal:
Soft-error filtering: A solution to the reliability problem of future VLSI digital circuits. Proc. IEEE 74(5): 669-683 (1986) - 1984
- [c1]Yvon Savaria, Vinod K. Agarwal, Nicholas C. Rumin, Jeremiah F. Hayes:
A Design for Machines with Built-In Tolerance to Soft Errors. ITC 1984: 649-659
Coauthor Index
Asim J. Al-Khalili
aka: A. J. Al-Khalili
aka: A. J. Al-Khalili
MohammadHossein AskariHemmat
aka: Mohammadhossein Askarihemmat
aka: Mohammadhossein Askarihemmat
François R. Boyer
aka: François-Raymond Boyer
aka: François-Raymond Boyer
[j139] [c288] [c276] [j120] [j115] [j114] [c274] [j111] [c265] [c263] [j105] [j104] [c253] [c252] [c250] [c249] [c246] [c245] [c244] [j97] [j95] [j93] [j91] [c242] [c240] [j87] [j83] [j82] [j80] [c233] [c232] [c231] [c227] [c211] [c206] [c195] [c190] [c185] [j67] [j60] [j53] [c132] [j48] [j47] [j46] [c130] [j40] [c126] [c120] [c117] [c111] [c110] [c104] [c103] [c101] [c95] [c94] [c87] [c84] [c67] [c52] [c43] [c38] [c35]
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