Lauterbach GmbH

🚗 𝐉𝐨𝐢𝐧 𝐮𝐬 𝐚𝐭 𝐍𝐗𝐏 𝐓𝐞𝐜𝐡𝐧𝐨𝐥𝐨𝐠𝐲 𝐃𝐚𝐲𝐬 𝐢𝐧 𝐃𝐞𝐭𝐫𝐨𝐢𝐭 🚙 Explore our market-leading #TRACE32 development tools at #NXPTechDays in Detroit and learn all about our unique support for more than 𝟚.𝟝𝟘𝟘 NXP Semiconductors chips including the newest automotive microcontrollers and multicore SoCs. 📆 October 30 - 31, 2024 🏨 Detroit, Michigan 𝐑𝐞𝐠𝐢𝐬𝐭𝐞𝐫 𝐡𝐞𝐫𝐞 𝐟𝐨𝐫 𝐟𝐫𝐞𝐞: https://lnkd.in/dpfz_--Q 𝐃𝐨𝐰𝐧𝐥𝐨𝐚𝐝 𝐦𝐨𝐫𝐞 𝐝𝐞𝐭𝐚𝐢𝐥𝐬 𝐚𝐛𝐨𝐮𝐭 𝐨𝐮𝐫 𝐝𝐞𝐛𝐮𝐠 𝐚𝐧𝐝 𝐭𝐫𝐚𝐜𝐞 𝐬𝐨𝐥𝐮𝐭𝐢𝐨𝐧𝐬 𝐟𝐨𝐫 𝐍𝐗𝐏 𝐡𝐞𝐫𝐞: https://lnkd.in/dFqKp9z4 #NXP #embedded #embeddedsystems #NXPpartner ##NXPTechDays24 #multicore #debug #trace #automotive #innovations

💻 𝐅𝐫𝐞𝐞 𝐖𝐞𝐛𝐢𝐧𝐚𝐫: 𝐒𝐩𝐞𝐞𝐝𝐢𝐧𝐠 𝐮𝐩 𝐒𝐚𝐟𝐞𝐭𝐲 𝐂𝐞𝐫𝐭𝐢𝐟𝐢𝐜𝐚𝐭𝐢𝐨𝐧𝐬 𝐰𝐢𝐭𝐡 𝐂𝐨𝐝𝐞 𝐂𝐨𝐯𝐞𝐫𝐚𝐠𝐞 𝐁𝐚𝐬𝐞𝐝 𝐨𝐧 𝐓𝐑𝐀𝐂𝐄𝟑𝟐® 𝐚𝐧𝐝 𝐭𝐡𝐞 𝐋𝐃𝐑𝐀 𝐓𝐨𝐨𝐥 𝐒𝐮𝐢𝐭𝐞 💻 Join our webinar co-hosted by LDRA Limited, to learn how the combination of the state-of-the-art #LDRA tool suite and #TRACE32®-based code coverage provides an excellent customer experience for efficient and time-saving code coverage measurements in all software development and test phases. 📆 Tuesday, 12 November 2024 ⏰ 10:00 am CET, 2:30 pm IST, 5:00 pm CST, 6:00 pm JST 📆 Tuesday, 12 November 2024 ⏰ 6:00 pm CET, 9:00 am PST 𝐋𝐞𝐚𝐫𝐧 𝐦𝐨𝐫𝐞 𝐚𝐧𝐝 𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫 𝐡𝐞𝐫𝐞: https://lnkd.in/dyvgsjhc #codecoverage #debug #trace #realtime #embedded #embeddedsystems #innovations #avionics #aerospace #automotive #robotics

🎥 𝐋𝐚𝐮𝐭𝐞𝐫𝐛𝐚𝐜𝐡 𝐚𝐭 𝐑𝐈𝐒𝐂-𝐕 𝐒𝐮𝐦𝐦𝐢𝐭 𝐍𝐨𝐫𝐭𝐡 𝐀𝐦𝐞𝐫𝐢𝐜𝐚 🎥 Two inspiring days at the #RISCVSummit in Santa Clara, great conversations with our customers and numerous partners within the RISC-V community. We would like to thank all visitors to our booth and in particular the great event organisation of RISC-V International ! Our FAE Dennis Griffith summarizes what we show on these two days in the attached video. Of course, we will be there for you again in 2025 when it's called: #RISCVEverywhere. #debug #trace #embedded #embeddedsystems #RISCVeverywhere #innovations

🎥 𝐋𝐚𝐮𝐭𝐞𝐫𝐛𝐚𝐜𝐡 𝐚𝐭 𝐑𝐈𝐒𝐂-𝐕 𝐒𝐮𝐦𝐦𝐢𝐭 𝐍𝐨𝐫𝐭𝐡 𝐀𝐦𝐞𝐫𝐢𝐜𝐚 🎥 Two inspiring days at the #RISCVSummit in Santa Clara, great conversations with our customers and numerous partners within the RISC-V community. We would like to thank all visitors to our booth and in particular the great event organisation of RISC-V International ! Our FAE Dennis Griffith summarizes what we show on these two days in the attached video. Of course, we will be there for you again in 2025 when it's called: #RISCVEverywhere. #debug #trace #embedded #embeddedsystems #RISCVeverywhere #innovations

🚀 𝐓𝐡𝐞 𝐖𝐚𝐢𝐭 𝐢𝐬 𝐎𝐯𝐞𝐫—𝐑𝐈𝐒𝐂-𝐕 𝐒𝐮𝐦𝐦𝐢𝐭 𝐍𝐨𝐫𝐭𝐡 𝐀𝐦𝐞𝐫𝐢𝐜𝐚 𝟐𝟎𝟐𝟒 𝐊𝐢𝐜𝐤𝐞𝐝 𝐎𝐟𝐟! Experience cutting-edge innovation live from the RISC-V® Summit in Santa Clara. Our team is showcasing the latest debug and trace solutions for RISC-V technology. There’s still one day left—visit us and see what’s next in embedded systems. 🎤 Don’t miss today’s presentation of our FAE Dennis Griffith on the topic 𝐇𝐞𝐭𝐞𝐫𝐨𝐠𝐞𝐧𝐞𝐨𝐮𝐬 𝐌𝐮𝐥𝐭𝐢𝐜𝐨𝐫𝐞 𝐃𝐞𝐛𝐮𝐠𝐠𝐢𝐧𝐠 𝐨𝐟 𝐑𝐈𝐒𝐂-𝐕 𝐂𝐨𝐫𝐞𝐬 𝐢𝐧 𝐂𝐨𝐦𝐩𝐥𝐞𝐱 𝐂𝐡𝐢𝐩𝐬: ⏰ Today, 12.55 pm 🗺️ Exhibit Hall A, Demo Theatre All information about the RISC-V Summit can be found here: https://lnkd.in/eHiEetVa #debug #trace #embedded #embeddedsystems #innovations #RISCVEverywhere

📣 𝐖𝐞 𝐀𝐫𝐞 𝐑𝐞𝐚𝐝𝐲 𝐭𝐨 𝐒𝐮𝐩𝐩𝐨𝐫𝐭 𝐒𝐲𝐧𝐨𝐩𝐬𝐲𝐬 𝐀𝐑𝐂-𝐕™ 𝐈𝐏 #RISCVEverywhere #debug #trace #embedded #embeddedsystems #automotive #innovations

📣 𝐉𝐨𝐢𝐧 𝐮𝐬 𝐚𝐭 𝐑𝐈𝐒𝐂-𝐕 𝐒𝐮𝐦𝐦𝐢𝐭 𝐢𝐧 𝐒𝐚𝐧𝐭𝐚 𝐂𝐥𝐚𝐫𝐚 📣 As your No.1 tool partner for all your current and future RISC-V projects, we will also be presenting our solutions at the next #RISCVSummit North America in Santa Clara on 22 and 23 October. 🎤 Don’t miss the presentation of our FAE Dennis Griffith on the topic 𝐇𝐞𝐭𝐞𝐫𝐨𝐠𝐞𝐧𝐞𝐨𝐮𝐬 𝐌𝐮𝐥𝐭𝐢𝐜𝐨𝐫𝐞 𝐃𝐞𝐛𝐮𝐠𝐠𝐢𝐧𝐠 𝐨𝐟 𝐑𝐈𝐒𝐂-𝐕 𝐂𝐨𝐫𝐞𝐬 𝐢𝐧 𝐂𝐨𝐦𝐩𝐥𝐞𝐱 𝐂𝐡𝐢𝐩𝐬: ⏰ Wednesday, October 23, 12.55 pm 🗺️ Exhibit Hall A, Demo Theatre Having played a major role in shaping the RISC-V standards for debugging and trace in the RISC-V working groups, we will be showing you demos for various RISC-V cores from different suppliers at our booth - also in heterogeneous configurations together with cores of other architectures. As an absolute highlight, we will also inform you about the 𝐈𝐧𝐝𝐮𝐬𝐭𝐫𝐲'𝐬 𝐟𝐢𝐫𝐬𝐭 𝐝𝐞𝐛𝐮𝐠 𝐬𝐨𝐥𝐮𝐭𝐢𝐨𝐧 𝐟𝐨𝐫 𝐯𝐢𝐫𝐭𝐮𝐚𝐥𝐢𝐳𝐞𝐝 𝐑𝐈𝐒𝐂-𝐕 𝐬𝐲𝐬𝐭𝐞𝐦𝐬, which we have developed with the #L4Re hypervisor of our partner Kernkonzept GmbH. All information about the RISC-V Summit can be found here: https://lnkd.in/eHiEetVa 🏃♂️ We look forward to seeing you once again - this time in Santa Clara! 🏃♀️ #debug #trace #embedded #embeddedsystems #RISCVeverywhere #innovations

📣 𝐋𝐚𝐮𝐭𝐞𝐫𝐛𝐚𝐜𝐡 𝐚𝐧𝐝 𝐊𝐞𝐫𝐧𝐤𝐨𝐧𝐳𝐞𝐩𝐭 𝐄𝐧𝐚𝐛𝐥𝐞 𝐃𝐞𝐯𝐞𝐥𝐨𝐩𝐦𝐞𝐧𝐭 𝐨𝐟 𝐕𝐢𝐫𝐭𝐮𝐚𝐥𝐢𝐳𝐞𝐝 𝐑𝐈𝐒𝐂-𝐕 𝐒𝐲𝐬𝐭𝐞𝐦𝐬 🚀 𝘼𝙨 𝙩𝙝𝙚 𝙞𝙣𝙙𝙪𝙨𝙩𝙧𝙮'𝙨 𝙛𝙞𝙧𝙨𝙩 𝙨𝙪𝙥𝙥𝙡𝙞𝙚𝙧𝙨, our partner Kernkonzept GmbH and we enable the development and testing of virtualized software systems on future #RISCV platforms - even before corresponding System-on-Chips (SoCs) are available in silicon. A software architecture for Software Defined Vehicles (SDV) for example combines cloud technologies with automotive functional safety and real-time requirements for the first time, with the consequence that #virtualization is indispensable. For this Kernkonzept's leading-edge and proven #L4Re #Hypervisor runs on the Generic RISC-V Virtual Platform implemented in the widely used emulation platform #QEMU, while our #TRACE32® debug and trace tools allow the analysis of the entire software stack including the L4Re Hypervisor itself and all virtual machines (VM) with their heterogeneous OSes and applications. 𝐅𝐢𝐧𝐝 𝐦𝐨𝐫𝐞 𝐝𝐞𝐭𝐚𝐢𝐥𝐬 𝐚𝐛𝐨𝐮𝐭 𝐭𝐡𝐢𝐬 𝐞𝐱𝐜𝐢𝐭𝐢𝐧𝐠 𝐧𝐞𝐰𝐬 𝐡𝐞𝐫𝐞: https://lnkd.in/gkikxnqr #embedded #embeddedsystems #automotive #avionics #safety #innovations #debug #trace #RISCVEverywhere

🚗 𝗝𝗼𝗶𝗻 𝐋𝐚𝐮𝐭𝐞𝐫𝐛𝐚𝐜𝐡 𝗮𝘁 𝗩𝗲𝗰𝘁𝗼𝗿 𝗧𝗶𝗺𝗶𝗻𝗴 𝗗𝗮𝘆 𝟮𝟬𝟮𝟰 ⏱️ This top event is a must for developers and specialists from the entire automotive value chain who carry out timing analyses for all types of automotive control units. There will be a full day of great presentations and demos, as well as the opportunity to network with experts, share experiences and explore the latest technologies. In his presentation 𝙏𝙞𝙢𝙞𝙣𝙜 𝘼𝙣𝙖𝙡𝙮𝙨𝙞𝙨 𝙤𝙣 𝙑𝙞𝙧𝙩𝙪𝙖𝙡𝙞𝙨𝙚𝙙 𝙀𝘾𝙐𝙨 𝙈𝙖𝙙𝙚 𝙀𝙖𝙨𝙮 - 𝙃𝙤𝙬 𝙩𝙤 𝙀𝙣𝙨𝙪𝙧𝙚 𝙍𝙪𝙣𝙩𝙞𝙢𝙚 𝙄𝙣𝙩𝙚𝙜𝙧𝙞𝙩𝙮 𝙞𝙣 𝙎𝘿𝙑𝙨, our system engineer Rudolf Dienstbeck will shed light on timing analysis in virtualised architectures under the control of a hypervisor - a hot topic for the development of Software Defined Vehicles (SDV). 🗺️ Vector Headquarter, Holderaeckerstrasse 36, 70499 Stuttgart-Weilimdorf ⏰ November 6th, 09.00 am Join our partner VECTOR Informatik and us in Stuttgart and let's shape the automotive future together! 🏎️ 𝗠𝗮𝗸𝗲 𝘀𝘂𝗿𝗲 𝘁𝗼 𝗺𝗮𝗿𝗸 𝘆𝗼𝘂𝗿 𝗰𝗮𝗹𝗲𝗻𝗱𝗮𝗿𝘀 𝗮𝗻𝗱 𝗿𝗲𝗴𝗶𝘀𝘁𝗲𝗿 𝗻𝗼𝘄: https://buff.ly/3zINNL2 #VectorTimingDay2024 #Embedded #EmbeddedSystems #Innovations #Safety #Automotive #SDV

🏎️ 𝐙𝐅 𝐚𝐧𝐝 𝐋𝐚𝐮𝐭𝐞𝐫𝐛𝐚𝐜𝐡 𝐭𝐨 𝐠𝐢𝐯𝐞 𝐣𝐨𝐢𝐧𝐭 𝐩𝐫𝐞𝐬𝐞𝐧𝐭𝐚𝐭𝐢𝐨𝐧 𝐚𝐭 𝐭𝐡𝐞 𝐄𝐒𝐄 𝐂𝐨𝐧𝐠𝐫𝐞𝐬𝐬 𝟐𝟎𝟐𝟒 We are happy to share that Benjamin Schatz from our long term customer and partner ZF Group and our system engineer Rudolf Dienstbeck will give a joint talk at the #ESEKongress ESE Kongress - Embedded Software Engineering Kongress about "𝑩𝒆𝒏𝒆𝒇𝒊𝒕𝒊𝒏𝒈 𝒇𝒓𝒐𝒎 𝑹𝒖𝒏𝒕𝒊𝒎𝒆 𝑨𝒏𝒂𝒍𝒚𝒔𝒆𝒔 𝒐𝒏 𝑽𝒊𝒓𝒕𝒖𝒂𝒍 𝑬𝑪𝑼𝒔". Together we shifted timing analyses for automotive ECUs from real hardware to virtual targets to run tests completely automatically on a server, 24 hours a day, 365 days a year. In this joint presentation the project will be described in detail, including all the challenges and ways to overcome them, as well as the concrete benefits that resulted for ZF in the end. Sounds interesting? Then you are welcome to join. Our slot is on Tuesday, 3 December 2024 in Sindelfingen. More details about the event and program are available at https://lnkd.in/dY_zS5Ge #ESEKongress #Timing #Debug #Trace #Automotive #Innovations #Embedded #Embeddedsystems