Codasip

🔔 Press release: Codasip selected to design a high-end RISC-V processor for the EU-funded DARE project Europe’s RISC-V leader to provide a customizable general-purpose processor for the €240M initiative

Next generation of applications will require increased performance to address real-time sensors, Neural-Network, and memory safety applications. The answer is here today, RISC-V. CMSIS enables a single ARM application to run across the ARM portfolio of processors. Now CMSIS enables these applications to run on RISC-V. CHERI's memory safety is built upon 13-years of research that can prevent 70% of known vulnerabilities. Visit Codasip at Embedded World, Hall 4, booth 4-103 and the CHERI Alliance at Hall 5, booth 5-169. #ew25 #dsp #cheri #embedded #riscv

Expand your AI imagination with RISC-V. Build your AI accelerator improving performance up to 100x using Bounded Customization with minimal effort. Develop your accelerator upon pre-validated building blocks using a design process that maintains the Core's verification status. To learn more at Embedded World, stop by Codasip at Hall 4, booth 4-103. #ew25 #embedded #riscv #ai #codasip

We are at Embedded World in Nuremberg, come say hi! You'll find us at booth 4-103. #ew25

Codasip has ported CMSIS-RTX RTOS to RISC-V emulating the NVIC so that SW migration from ARM can be made even easier. Try out our space invader demo to see it in action in Hall 4, booth 4-103. Nothing wrong with a bit of fun at #EmbeddedWorld #EW25 #CMSIS :)

One week to go! Meet us at GOMACTech 2025 in Pasadena on March 18-19. We will show you how to eliminate cyber threats with #RISCV and #CHERI.

I'm in Germany ready for Embedded World #EW25. I'll be representing #Codasip on the #CHERI Alliance booth 5-169. We've got a great demo of CHERI Linux running on our X730 processor, please drop by if you are at the show too.

RISC-V is a market disruptive force. Through RISC-V's open architecture, innovative solutions creating magnitudes of performance improvement at a fraction of traditional silicon area are realized. Codasip's CMSIS-DSP and CMSIS-NN libraries unleash the power of RISC-V to ARM software developers. What new innovative products can be created with performance of 5x, 20x, or 100x at a fraction of the cost? Could it be combining Neural Network processing on sensor nodes, increasing battery life of mobile products, or drive the evolution of intelligent automotive devices? Visit the Codasip booth at Embedded World, Hall 4, booth 4-103 to visualize the power of your CMSIS applications on RISC-V. #ew25 #riscv #embedded #cmsis #dsp

🚀 DARE SGA1: Pioneering Europe’s Digital Autonomy in #HPC & #AI with RISC-V 🚀 We’re thrilled to announce the official launch of DARE SGA1 (Digital Autonomy with RISC-V in Europe)! This groundbreaking initiative, supported by the EuroHPC Joint Undertaking (EuroHPC JU) and coordinated by Barcelona Supercomputing Center (BSC-CNS), marks a major milestone in Europe's journey toward technological sovereignty. 🔹 What is DARE SGA1? With €240M in funding and 38 leading partners from across #Europe, DARE SGA1 is developing a fully European HPC and AI stack—from high-performance and energy-efficient processors to an optimized software ecosystem tailored for research and industry applications. 💡 Discover more in our press release https://lnkd.in/dNgJYxBh ➡️ Join us on this journey towards Europe’s digital autonomy! https://lnkd.in/dwKuy2h2 #DARE_RISCVEU #RISCV #EuroHPC #HPC #AI #DigitalSovereignty RISC-V International European Centre for Medium-Range Weather Forecasts - ECMWF imec Codasip Axelera AI ICSC - Centro Nazionale di Ricerca in HPC, Big Data e Quantum Computing MEGWARE Computer Vertrieb und Service GmbH IT4Innovations National Supercomputing Center ParTec AG OPENCHIP & SOFTWARE TECHNOLOGIES CINECA KTH Royal Institute of Technology FER Forschungszentrum Jülich Chalmers University of Technology Foundation for Research and Technology - Hellas (FORTH) EXAPSYS Exascale Performance Systems Osman Unsal Eugene Griffiths                      

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