Circuit Design Engineer

Position: Circuit Design Engineer

Location: Bay Area, CA (Hybrid/Remote)

Responsibilities:

• Circuit Design experience for std cells and memories.
• Perform IP PPA analysis and vendor comparisons.
• Customize foundation IPs (memories, standard cells, GPIO, eFUSE) for SOC products.
• Provide specifications and requirements to vendors.
• Debug and resolve verilog, GLS, DFT, power management, and UPF modeling IP issues.
• Create IP usage guidelines and analyze bug tracking data.

Qualifications:

• Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or Computer Engineering.
• Over 5 years of experience in the semiconductor industry.
• Experience in foundation IP development.
• Knowledge of standard cell and memory design, and RTL to GDS flow.
• Scripting skills, preferably in Python.
• Strong communication and independent work skills.