Abhishekkumar Thakur’s Post

View profile for Abhishekkumar Thakur

R&D Process Engineer, Optics | Atomic Layer Deposition (ALD)

At IEDM, TSMC suggests that CNTs could be interesting to develop high performance logic in the back-end-of-line The Stanford University and TSMC group focused on their chemical recipes for doping N type CNT transistors. Last year at IEDM, the team described their methods for making P-type CNT transistors. This week, they presented their work on N-type. Now that they have high performance transistors of both types, the Stanford team says they’ve shown that CNT CMOS can rival silicon CMOS. But there’s more hard work ahead. One of the last big things on the to-do list is for some chemists or materials scientists to perfect a method for precisely placing CNTs on a wafer. Today, engineers know how to make perfectly straight, parallel arrays of the nanomaterials, all lined up on silicon wafers like a row of pencils in a box. But the spacing between the nanotubes is uneven. When engineers can control this spacing, or pitch, they may finally be able to achieve the material’s full potential. #semiconductor #semiconductorindustry #tsmc #intel #samsung #imec #globalfoundries #smic #umc #innovation #ai #computerchips #machinelearning #broadcomm #transistor #cowos #skhynix #microntechnology #kioxia #nanya #toshiba #ymtc #yangtze #scaling #moore #manufacturing #production #fabrication #apple #nvidia #arm #amd #qualcomm #ibm #huawei #chip #chipdesign #chipmaker #memory #logic #cpu #processor #FEOL #BEOL #interconnects #dram #nand #3Dnand #nandflash #storage #asml #euv #lithography #zeiss #optics #reticle #photomask #anamorphic #metalorganic #photoresist #laser #trumpf #nanotube

To view or add a comment, sign in

Explore topics