Dive into the future of technology! The IEEE Journal on Exploratory Solid-State Computational Devices and Circuits is seeking papers for their special topic on "Energy-Efficient In-/Near-Memory Computing with Emerging Devices". Submissions open until September 1, 2024. Topics specifically solicited are listed here: https://bit.ly/3VCCVqe 🚀🌐💡
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Congratulations to Dr. Richa Sharma (Assistant Professor #scsetbennett) for acceptance of the #conference paper, “Adversarial Label Flipping Attack on Supervised Machine Learning based HT Detection Systems” for #publication in IEEE International Symposium on Circuits and Systems (ISCAS-24), Singapore. This paper addresses the vulnerability of supervised machine learning (ML) systems used for Hardware Trojan (HT) detection in semiconductor integrated circuits. It introduces a label flipping poisoning attack that targets these ML-based HT detection systems during the pre-silicon design phase. Using an Isolation Forest algorithm, the method identifies potential Trojan nets, flips their labels to disrupt the model training process, and employs random subsampling to manipulate Trojan-free samples similarly. The attack, which is model-independent and untargeted, was tested against several Benchmarks, significantly reducing the model's recall and highlighting the susceptibility of ML-based HT detection systems to such adversarial tactics. #bennettuniversity #FacultyatBU #machinelearning #hardwaretrojan #poisoningattack #forestalgorithm
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📃Scientific paper: Physical Implementation of a Tunable Memristor-based Chua's Circuit Abstract: Nonlinearity is a central feature in demanding computing applications that aim to deal with tasks such as optimization or classification. Furthermore, the consensus is that nonlinearity should not be only exploited at the algorithm level, but also at the physical level by finding devices that incorporate desired nonlinear features to physically implement energy, area and/or time efficient computing applications. Chaotic oscillators are one type of system powered by nonlinearity, which can be used for computing purposes. In this work we present a physical implementation of a tunable Chua's circuit in which the nonlinear part is based on a nonvolatile memristive device. Device characterization and circuit analysis serve as guidelines to design the circuit and results prove the possibility to tune the circuit oscillatory response by electrically programming the device. ;Comment: Accepted by IEEE 48th European Solid State Circuits Conference (ESSCIRC 2022) Continued on ES/IODE ➡️ https://etcse.fr/MhCgx ------- If you find this interesting, feel free to follow, comment and share. We need your help to enhance our visibility, so that our platform continues to serve you.
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https://lnkd.in/gHMc28is 🎉 Exciting News! Our latest research paper, “Quantum Computing for Optimization with Ising Machine,” has just been published on IEEE Xplore! 🚀
Quantum Computing for Optimization With Ising Machine
ieeexplore.ieee.org
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Dive into one of our February 2024 highlighted articles, "TFT-Based Near-Sensor In-Memory Computing: Circuits and Architecture Perspectives of Large-Area eDRAM and ROM CiM Chips." 📝 Authored by: Jialong Liu; Wenjun Tang; Hongtian Li; Deyun Chen; Weihang Long; Yongpan Liu; Chen Jiang; Huazhong Yang; Xueqing Li This work explores TFT-based near-sensor in-memory computing from architecture design to chip design. The fabricated chips implement neural network layers exhibit significant improvement in computing performance and energy efficiency, and showcase the opportunity of high computing precision and reliability in TFT-based smart edge sensing. 🔗 Continue reading on IEEE Xplore: https://loom.ly/Wio7ku0 #TCASI #IEEE #IEEEXplore #CircuitsandSystems #ReadMore #February2024Highlight
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Excited to share that my research paper has been published in the Analog Integrated Circuits and Signal Processing Journal of Springer! 🎉📝 My paper explores a variable reactance-based capacitive RF-MEMS switch with multifrequency operation for mmWave applications. Looking forward to advancing the field further! #Research #MEMS#Switches #PublishedPaper
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Hi Connections! I am delighted to share that I presented my research titled "Enhanced Image De-Hazing Using Novel Hybrid Filtering and Perceptual Fog Density Improvement" at the 4th IEEE International Conference on Computing, Communication, and Intelligent Systems 2023. I would like to thank my guide, Dr. Deepshikha Agarwal, for all the support and guidance for this publication. The conference proceeding is now published and available online on IEEE Xplore Digital Library at https://lnkd.in/d9S8ESVj #ieee #icccis2023 #imageprocessing #ieeeconference
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Our paper "Big-PERCIVAL: Exploring the Native Use of 64-Bit Posit Arithmetic in Scientific Computing" just got accepted for publication in IEEE Transactions on Computers. This marks a significant milestone in my PhD journey, being my second top-level journal publication as a first author, with a JCR'22 Q2 JIF=3.7. You can dive into the details here: https://lnkd.in/d5aARSsq Big-PERCIVAL is also available on GitHub with an open-source hardware license: https://lnkd.in/e3yyY4An In our study, we dive into the world of 64-bit posit arithmetic in scientific computing. We compare its performance, accuracy, and hardware costs against IEEE 754 doubles through various numerical benchmarks. Our findings show promising accuracy improvements with posit64, with up to 4 orders of magnitude lower mean square error compared to doubles. While this could reduce iteration requirements for some solvers, we also discuss limitations, particularly in operations like matrix multiplications. Despite the significant hardware costs, the accuracy enhancements and efficient memory bandwidth usage hint at posit arithmetic's potential as an alternative in scientific computing. Join us in exploring the potential of posit arithmetic in scientific computation with Big-PERCIVAL! #ScientificComputing #PositArithmetic #PhDResearch #Hardware #Computing #Arithmetic #RISCV #OpenSource
Big-PERCIVAL: Exploring the Native Use of 64-Bit Posit Arithmetic in Scientific Computing
ieeexplore.ieee.org
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Lead Manager - Data Science | Data Science SME | Machine Learning, Deep Learning Expert | Content Creator | Solutioning
Happy to share that one of my recent works entitled "Predicting the Depression based on Motor Activity of Individuals using Time Series Forest Classifier" has been published in #IEEEXplore ! This paper was presented at IEEE International Conference on Electronics, Computing and Communication Technologies (IEEE CONECCT 2024) during July 2024. #IEEE #Research #aiformentalhealth #prediction #machinelearning https://lnkd.in/gcFtH4RE
Predicting the Depression based on Motor Activity of Individuals using Time Series Forest Classifier
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🚀 Thrilled to Announce a New Publication! 🚀 I am excited to share that our work, titled "Chip and Package-Scale Interconnects for General-Purpose, Domain-Specific, and Quantum Computing Systems – Overview, Challenges, and Opportunities," has been published in the IEEE Journal on Emerging and Selected Topics in Circuits and Systems! This article provides an in-depth review of the latest advancements in chip and package-scale interconnects, driven by evolving architectures, applications, and cutting-edge technologies. It highlights the current state of the field, outlines critical challenges, and identifies high-impact opportunities in interconnect design for general-purpose, domain-specific, and quantum computing architectures. I had the privilege of collaborating with Maurizio Palesi, John Kim, and Partha Pande, leading experts who have significantly contributed to this field. Their insights were invaluable in shaping this work. We have built upon a wealth of existing literature and coupled our observations with the latest advancements. For those interested in exploring this area further, our article offers a detailed perspective and is backed by comprehensive references. Additionally, we outline several pressing challenges and exciting opportunities that can guide future research and innovation in next-generation interconnect design. We truly believe this paper will serve as a useful resource for researchers and practitioners aiming to push the boundaries of interconnects for general-purpose, domain-specific, and quantum computing systems. 🔗 Link to the paper in IEEE Xplore (#OpenAccess): https://lnkd.in/dBZppZcx #Research #Innovation #ChipDesign #Interconnects #EmergingTechnologies #QuantumComputing #IEEE #JETCAS
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Excited to share that my research paper on dynamic resource allocation in edge computing has been selected for the Fifteenth International Conference on Computing, Communication, and Networking Technologies (ICCCNT), to be held at IIT-Mandi, in association with IEEE Electronics Packaging Society, from June 24th - 28th, 2024! 🌐✨ This paper presents a comprehensive edge computing simulation framework combining the Deutsch-Jozsa quantum algorithm, game theory-based resource allocation, cross-layer optimization, and collaborative multi-edge scheduling techniques. With visualization modules like bar charts, pie charts, and heatmaps, the framework demonstrates significant improvements in resource utilization and latency reduction, making it highly effective for time-sensitive applications. Simulation results show how this innovative approach enhances performance and adheres to QoS requirements compared to traditional methods. Can't wait to present this work and engage with other researchers in this cutting-edge field! 📊📈 #ICCCNT2024 #EdgeComputing #QuantumComputing #GameTheory #ResourceAllocation #Optimization #Technology #Research #IEEE #IITMandi #Innovation
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