Natcast.org’s Post

 ❗ LIMITED SUBMISSION ANNOUNCEMENT – QUICK TURNAROUND❗ The UC Davis Office of Research is announcing a quick-turnaround internal competition for the National Semiconductor Technology Center (NSTC) Workforce Partner Alliance Program (WFPA). Click here to view the competition page: https://lnkd.in/gAgd668b ♦ Internal Expression of Interest (EOI) Deadline: This Thursday, July 11, 2024 (An EOI consists of a one-paragraph abstract and a CV/Biosketch for the PI only) ♦ Funding Organization's Deadline: Friday, July 26, 2024 ♦ Institutional Limit: Only one application per lead applicant will be accepted ♦ Program Description: On July 1, 2024, Natcast.org, the purpose-built, non-profit entity created to operate the National Semiconductor Technology Center (NSTC) Consortium, launched the NSTC Workforce Partner Alliance (WFPA) program. The program creates a nationwide fund to support projects that will address a critical workforce need in the U.S. semiconductor industry to help to close key skills and labor market gaps and fuel industry and national economic growth. This initial funding program will focus on closing workforce and skills gaps in the U.S. for researchers, engineers, and technicians across semiconductor design, manufacturing, and production. Natcast encourages a wide range of workforce solution providers to apply for this initial workforce funding program. Entities providing semiconductor-related education or training programs, products, or activities developed to prepare, encourage, motivate, or enable individuals to obtain the skills or credentials required for jobs across the semiconductor ecosystem in the U.S. should consider applying. UC Davis Electrical and Computer Engineering UC Davis College of Engineering

Exciting news!!! Let’s talk about your needs and how NXP can help.

I’ve been remiss in updating LinkedIn-Land about all that is going on in the NSTC, but today is a big day and I couldn’t miss this one. Let’s get caught up. “But what is the NSTC going to be, physically? Will it be a place? A fab?” is the most common question I’ve gotten since Day 1 on the job. It is the most consequential decision that will be made in shaping the NSTC for years to come. Today I’m excited to say we’ve announced a facilities model and a process for making selections that will allow us to move quickly, efficiently, and fairly to establish these facilities. First, the NSTC needs to be a place, one where people convene, where people can do collaborative (and independent when needed) research. One of the biggest gaps that we’ve heard is a lack of facilities to bring new technologies to commercial manufacturing. Without a place, the NSTC is effectively a funding agency. We have those. The NSTC needs to be different and to fill gaps that existing agencies do not fill. The next question is, what kind of place? See the model document for a sneak peek. The model provides a foundation for a wide range of research. It enables work that we know we need to get started today, and it has the flexibility to be what we don’t realize we need in decade. https://lnkd.in/ea9QeKsH https://lnkd.in/eEuF2vrY https://lnkd.in/emqfc7Rn I could go on about infrastructure, but there’s more. We have our first funding opportunity for workforce development on the street. This is a broad opportunity to scale concepts that address skill gaps in the semiconductor workforce, across all segments and skill levels. There’s much more to come. https://lnkd.in/eYTBv8vT We have our first funding opportunity for R&D on the street. In fact we held the Proposer’s Day for Artificial Intelligence Driven RF Integrated Circuit Design Enablement (AIDRFIC) yesterday. It’s the first in a series of early start programs, and is building the muscle for creating research communities in advance of the longer-term research strategy. https://lnkd.in/e-s_r2hR That’s what we’ve been able to announce over the last month. There is a lot more in the works! Please stay tuned. If you haven’t already, please sign up for email updates at chips.gov and natcast.org. Please get engaged! Finally, just a huge thank you to all the people working so hard behind the scenes to make all of this possible. Thank you Deirdre Hanford for being such a great leader and partner, and to the entire team at #Natcast. I’m incredibly proud of our team at the Commerce Department, including Scott Bukofsky, Greg Yeric, Maria Messick, Tori Brown, Joshua Mandell, Devika Daga, Scott Shepard PhD, Alberto Alberto, Javier Araujo O'Neill, Courteney Lytch, Paige Herwig, Liani Balasuriya, Briana Petyo Frisone Richard-Duane Chambers, Eric Lin and so many other partners.

EETimes recently had the chance to catch up with Lars Reger, executive VP and CTO at NXP Semiconductors, to discuss his journey in electronics, his career highlights and lowlights, the impact of Chips Acts, deglobalization, and talent development. He shared a few words of advice for aspiring engineers: stay curious, don't be afraid to take chances, have a good time, and don't set your expectations too high. Click the link below to listen in on the full interview!

Next strategic move to enhance supply chain resilience for long term growth! 恩智浦半導體 and 世界先進 jointly plan to build a new 300mm semiconductor manufacturing facility in Singapore. The joint-venture fab will support 130nm to 40nm mixed-signal, power management and analog products, targeting the automotive, industrial, consumer and mobile end markets. The underlying process technologies are planned to be licensed and transferred to the joint venture from TSMC. #supplychain

As AI continues to drive innovation, the demand for advanced chips will only grow, highlighting the strategic importance of companies like TSMC. This intersection of trading, AI, and geopolitics reflects a future where technological advancements and market dynamics are increasingly intertwined, influencing not just financial markets but also global power structures.

EETimes recently had the chance to catch up with Lars Reger, executive VP and CTO at NXP Semiconductors, to discuss his journey in electronics, his career highlights and lowlights, the impact of Chips Acts, deglobalization, and talent development. He shared a few words of advice for aspiring engineers: stay curious, don't be afraid to take chances, have a good time, and don't set your expectations too high. Click the link below to listen in on the full interview!

EETimes recently had the chance to catch up with Lars Reger, executive VP and CTO at NXP Semiconductors, to discuss his journey in electronics, his career highlights and lowlights, the impact of Chips Acts, deglobalization, and talent development. He shared a few words of advice for aspiring engineers: stay curious, don't be afraid to take chances, have a good time, and don't set your expectations too high. Click the link below to listen in on the full interview!

EETimes recently had the chance to catch up with Lars Reger, executive VP and CTO at NXP Semiconductors, to discuss his journey in electronics, his career highlights and lowlights, the impact of Chips Acts, deglobalization, and talent development. He shared a few words of advice for aspiring engineers: stay curious, don't be afraid to take chances, have a good time, and don't set your expectations too high. Click the link below to listen in on the full interview!