Oakdoor ’s Post

I recently trying Flux.1 from https://lnkd.in/g6Tjm_XQ in my comfyUI. And it was amazing. Comparing with SDXL dan SD3, Flux.1 can generate better image, understand prompt better, and it can also generate text, just like SD3. As relatively new model, Flux.1 still doesn't have other community support such as LoRA or ControlNet, but maybe in next couple of month since Flux.1 release at August 1st, 2024. Sample image taken from their website, with Flux.1 [pro]. I tried to use Flux.1 [dev] but it still have problem load into VRAM. So I just use Flux.1 [schnell] which is the lowest of their rank, but still have better result.

In case you missed it, we have a new DAS1800 page to give you a deep dive look into our new high speed data acquisition system! Click on the link below to learn more about this highly configurable DAQ solution featuring 10 slots for input modules and an all new user interface. https://lnkd.in/geCsg423 #ModularDAQ #DAS #DAQ #HighSpeedDataAcquisition

Specialized Hardware for Brain-Computer Interfaces: Overcoming Data Bottlenecks

Today we tested the transfer channel option. An useless feature, because you cannot use it at all if the user already opened 10 channels. via https://buff.ly/3vkxLFb #rtpnews #roadtopetabyte #telegram #rtpannouncements #roadtopetabyteannouncements #rtpannouncement #roadtopetabyteannouncement

I am so freaking excited to launch this feature I just have to share a preview. What you are seeing below are *live* and *accurate* histograms of DNS resolution latency being collected across a fleet of devices. What is so special about this you might ask? First, these are dynamically controllable from our control plane. You want a histogram of DNS latency? Sure. You want a histogram of disk space usage? No problem. You want a histogram of some random field on a log line you didn't realize you needed? Absolutely. Second, histograms are notoriously difficult to compute accurately, especially with a large number of clients. What we have *not* done is give you the average of the P99 across all the clients (this isn't P99!). Instead, we have built a cost efficient pipeline capable of aggregating and merging dynamic range sketches all the way from every client. We also handle accurate backfill since data can arrive late regularly. The pipeline can also handle a large amount of cardinality efficiently. We will have a full technical blog post writeup on how this all works, but we have been playing with this feature already and the number of times in my career I would have died for this capability is ... many many times. More soon!

Setup Time 1 1.To understand how a setup violation happens lets go through this scenario: Lets assume the FF was storing a logic zero (0) 2.Now a new data arrives at the D input ,that is logic one (1), and starts overwriting the previous stored value 3.The clock edge arrives before the new data have time to overwrite node D. The transmission gates switch

Good morning👋👋 i would like to share on physical page allocation in the xv6-riscV operating system. Physical page allocation is the key pillar of virtual memory addressing by both kernel and user processes.Virtual memory addressing is where a process "thinks" its in charge of the memory fully but in real sense it has a memory block in which it's limited to. This is of great importance as one process cannot access or write into other process memory. ✨️✨️how is physical page allocation done? The operating system is loaded at hex 0x80000000L(beginning of ram).The operating system with take a section of memory and the remaining memory will be left for user processes.This section of memory is which will subdivided into pages @4096 bytes in size.The first page will be at the end of kernel in ram memory and the last will end at the end of ram memory. A linkedlist data structure will be used to keep track of the page. Next we look at virtual memory addressing.Thank you🙌.

Premium purchase in the last beta is not possible, even if they show that via https://buff.ly/3TV96QX #rtpnews #roadtopetabyte #telegram #rtpannouncements #roadtopetabyteannouncements #rtpannouncement #roadtopetabyteannouncement

This article provides a comprehensive overview of #HPC fundamentals and the workings of #ROCE technology, alongside a thorough comparison of test results between Asterfusion #ROCEdatacenterswitches and #IBs in a #HPC scenario.