Packet Architects AB

We are looking for a new SW/HW Engineers! Role Description This is a full-time on-site role for an Embedded Programmer with a keen interest in hardware and networking at Packet Architects AB in Lund. The role involves tasks such as software development, programming, and object-oriented programming to support the development of high-performance networking silicon solutions. This role is in Lund , Sweden. The job is onsite 100%. Qualifications Computer Science and Software Development skills Experience in C / C++ / Python Experience in System Verilog / Hardware Debug Experience in myHDL / Verilator Experience in hardware verification / constrained random verification Strong programming and Object-Oriented Programming (OOP) skills Ability to work with embedded systems and hardware Experience in networking protocols and technologies Knowledge of switch/router architectures Bachelor's degree in Computer Science or related field Email robert.wikander@packetarc.com with your CV.

We are looking for a new SW/HW Engineers! Role Description This is a full-time on-site role for an Embedded Programmer with a keen interest in hardware and networking at Packet Architects AB in Lund. The role involves tasks such as software development, programming, and object-oriented programming to support the development of high-performance networking silicon solutions. This role is in Lund , Sweden. The job is onsite 100%. Qualifications Computer Science and Software Development skills Experience in C / C++ / Python Experience in System Verilog / Hardware Debug Experience in myHDL / Verilator Experience in hardware verification / constrained random verification Strong programming and Object-Oriented Programming (OOP) skills Ability to work with embedded systems and hardware Experience in networking protocols and technologies Knowledge of switch/router architectures Bachelor's degree in Computer Science or related field Email robert.wikander@packetarc.com with your CV.

We're #hiring a new RTL Design & Verification Engineer in Lund, Skåne County. Apply today or share this post with your network.

Packet Architects can help you reach this market _F_A_S_T! Using our Flexswitch generator your 51.2Tbit/s or 102.4Tbit/s design with 1.6Tbit/s ports could be in your hands faster than you think! https://lnkd.in/e8PvkuPU

Latest Developments in Ethernet Networking: A Game-Changer for AI and Beyond The Ethernet networking landscape is experiencing significant advancements, particularly in response to the growing demands of artificial intelligence (AI) workloads. Recent developments underscore the pivotal role of Ethernet in shaping the future of high-performance computing, with major industry players like Broadcom, NVIDIA, and Cisco driving innovations that promise to redefine network infrastructure. One of the most noteworthy trends is the shift towards Ethernet-based solutions for AI back-end networks. Traditionally dominated by InfiniBand, this space is rapidly embracing Ethernet as a scalable, multi-vendor alternative. This shift is driven by the need for more robust connectivity solutions to support the massive computational requirements of AI workloads, such as training large language models. The Ethernet Adapter and Smart NIC market is projected to exceed $16 billion by 2028, with a 27% compound annual growth rate, underscoring the growing demand for high-speed server connectivity (650 Group) (Dell'Oro Group). The Ethernet Alliance has highlighted the resurgence of its Technology Exploration Forum (TEF), with a focus on "Ethernet in the Age of AI." This forum will serve as a crucial platform for industry leaders to discuss the integration of Ethernet in AI systems, addressing challenges related to topology, architecture, and energy efficiency (Ethernet Alliance). As Ethernet continues to evolve, staying ahead of these trends will be crucial for companies aiming to capitalize on the expanding AI and high-performance computing markets and we at Packet Architects are here to help your next ASIC/FPGA design in AI, NIC or Switch/Routing space.

Keep up the good work, dragon workers!

We are back at work and developing new and exciting features for our Switch/Router IPs. The following features has now been added to our IP: - Ability to store packet data in DRAM. This allows a design on certain ports/queues to have a external spill over buffer and store this in DRAM when the internal SRAM is not large enough. - Hierarical QoS Scheduler. This allows a customer to have up to 6 levels of scheduler and the scheduler order is defined by software, each level has their own shapers. - IP-in-IP translation. Our packet processing now understand and allows a routed packets to enter/exit in IPvX-over-IPvY networks without having to re-circulate the packet multiple times. IP headers can be be both added and removed allowing the router to enter into IP tunnels and exit from IP tunnels. ... What is the next feature you want in your next switch/router IP?

Want to create your own 24 x 5Gbit/s Ethernet Switches? Talk to us and we'll create this IP for you! #Ethernet #EthernetSwitching https://lnkd.in/esbJFU-x

If you are building a AI super chip we can help you with three levels of scaling: (1) Create a NVswitch compeditor with your own packet processing protocol (2) Create a NIC with custom packet processing which allows you to scale your system (3) Create a Custom high end switch which will enable you to scale your system to hundres of thousands of nodes! .... Let the AI scaling being!

AI is everywhere and so is startups building their own AI chips! For all the AI companies building their own AI chips, at some point you are going to need to scale your solution to connect to many devices. This is where packet architects can help! We have recently released a version of our tool where you can build your own packet processing solutions using our PAC toolchain! Talk to us and we'll help you in your scaling out problems!