lowRISC CIC

Join us on 27 March at Digital Catapult's showcase to explore the Digital Security by Design (DSbD) cohort’s work on #CHERIoT and #CHERI for embedded devices and how it can benefit businesses now and into the future. During the showcase, lowRISC CIC's Dr. Marno van der Maas, SCI Semiconductor's David Chisnall, and Codasip's Carl Shaw will participate in a panel discussion featuring their learning, successes, and insights gained while using the Sonata platform. Register here: https://lnkd.in/eRu6rZzi

Attending embedded world Exhibition&Conference this week? Tomorrow, our team will be giving a demo of the #Sonata platform in the Dev Kit Zone at Embedded Computing Design's booth at 3:30 p.m. Be sure to stop by! You can also plan to view the new OpenTitan demo board - Voyager - and learn more about Sonata from members of the lowRISC and NewAE Technology Inc. teams who will be at the CHERI Alliance booth 5-169! https://lnkd.in/d7stbc9T

There's never been a more exciting time to join the lowRISC team! As a Senior/Principal Design Verification Engineer your focus will be on DV for the range of open-source designs we are collaboratively developing, including future iterations of OpenTitan! Interested? Apply now: https://lnkd.in/emaN-fhw

Next week at the embedded world Exhibition&Conference our team will be giving a demo of the #Sonata board in the Dev Kit Zone at Embedded Computing Design's booth at 3:30 p.m. on March 12. View the new OpenTitan Voyager board and learn more about Sonata from members of the lowRISC and NewAE Technology Inc. teams who will also be at the CHERI Alliance booth 5-169! Reach out to info@lowrisc.org to book a demo! https://lnkd.in/d7stbc9T

Marno Van der Maas followed his #soocon25 talk on the CHERI Alliance with an exciting tutorial: how to compose and modify #OpenTitan IP blocks to create your own chip! Watch his walkthrough and learn how to build your own SoC from scratch: https://lnkd.in/eTmNe8Fh

At #soocon25 Marno van der Maas discussed the problem of memory safety, how CHERI technology can help, and gave an introduction to CHERI Alliance! Didn't get to attend the talk at the show? You can watch his full "Introduction to the CHERI Alliance" presentation now: https://lnkd.in/dTqz3kji

Eager to jump into the world of Sonata - the open source hardware and bitstream for evaluating CHERIot? Watch our Senior Project Manager John Thomson's full talk from #FOSDEM2025 on the technology that is getting CHERI and CHERIot into the mainstream, now available on demand ▶️ https://lnkd.in/eZd56Ax9

It was great to meet many familiar and some new faces at the Digital Security by Design (DSbD) showcase event. Many from the ecosystem are using the lowRISC CIC and NewAE Technology Inc. produced Sonata boards for exploring CHERIoT-Ibex in the embedded and operational technology space. We had lots of interesting discussions, but if you didn't get a chance to catch up or have any questions please email info@lowrisc.org!

Are you an experienced design verification engineer looking for your next opportunity to make an impact? For our Senior DV Engineer role we are seeking someone to design, implement and debug block-level and system-level tests and testbenches, develop test and coverage plans for new or updated silicon designs and much more! If you're ready to join the team in Cambridge raising the bar for verification of open source projects to meet the highest commercial standards, apply now: https://lnkd.in/emaN-fhw

I’ve been following the CHERI program for a few years and while it was a project initiated by organisations like University of Cambridge, DARPA, Google, and Microsoft and championed by the UK government in the form of the Digital Security by Design program, it’s now at the stage where 160 companies and a 1000 people are looking at CHERI to tackle memory safety vulnerabilities in computing systems. As Richard Grisenthwaite said in his talk this evening in London at an event to mark the end of this phase of the DSbD program, “the cleverness of cybercriminals is immense. Memory safety remains a fundamental problem, and CHERI provides a way of compartmentalisation so when there’s a breach, key functions stay in their boxes and damage can be minimized”. EE Times | Electronic Engineering Times UK Research and Innovation Digital Security by Design (DSbD) #cybersecurity #embedded #computing